Test-Pattern Selection for Screening Small-Delay Defects in Very-Deep Submicrometer Integrated Circuits

Timing-related defects are major contributors to test escapes and in-field reliability problems for very-deep submicrometer integrated circuits. Small delay variations induced by crosstalk, process variations, power-supply noise, as well as resistive opens and shorts can potentially cause timing fai...

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Veröffentlicht in:	IEEE transactions on computer-aided design of integrated circuits and systems 2010-05, Vol.29 (5), p.760-773
Hauptverfasser:	Yilmaz, Mahmut, Chakrabarty, Krishnendu, Tehranipoor, Mohammad
Format:	Artikel
Sprache:	eng
Schlagworte:	Automatic test pattern generation Circuit testing Computational intelligence Counting Crosstalk Defects Delay Delay test Design engineering Deviation Integrated circuit noise Integrated circuit reliability Integrated circuit testing Integrated circuits output deviations process variations Screening small-delay defects Test pattern generators Test systems test-pattern grading Timing
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