The LANL Neutron-Science-Center time-of-flight/position-sensitive-detect module: status and progress
This paper describes the progress and current status of a joint collaboration between Argonne National Laboratory (ANL) and the Los Alamos National Laboratory (LANL) Manuel Lujan Neutron Science Center (MLNSC) to develop and implement a Time-of-flight (TOF)/Position-Sensitive-Detector (PSD) VXI-base...
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description | This paper describes the progress and current status of a joint collaboration between Argonne National Laboratory (ANL) and the Los Alamos National Laboratory (LANL) Manuel Lujan Neutron Science Center (MLNSC) to develop and implement a Time-of-flight (TOF)/Position-Sensitive-Detector (PSD) VXI-based C-size neutron-event data-collection module. The LANL module, based on the ANL-developed hardware which uses field-programmable gate arrays (FPGAs) and analog-input-signal conditioning modules for a flexible topology capable of accepting either eight or 16 input channels, has been programmed and modified to incorporate more LANL-specific features such as improved peak detection, 24-bit time stamps, and 16-bit channel identification numbers which are all part of a 64-bit event record (2 by 32-bits wide). Using a backplane 10-MHz clock, timing resolution is /spl plusmn/50 ns. The module uses two, frame first-in-first-out buffers (FIFOs), each 2-kwords deep, to accumulate event data at up to 330 kEvents/sec during a frame until the host computer can read it out. One FIFO is read while the other is being filled. The module does not use the ANL token-passing configuration for accessing data. Rather, it uses direct logical-address and register-based addressing modes. To interface with analog signals from the neutron detectors, the module incorporates eight 72-pin single-inline-memory-module-size plug-in boards, called SIMs, which contain differential receivers, analog threshold comparators, and 8-bit analog-to-digital converters. A total of 16-analog channels are available if used in TOF mode, or eight channels if used in PSD mode. |
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The LANL module, based on the ANL-developed hardware which uses field-programmable gate arrays (FPGAs) and analog-input-signal conditioning modules for a flexible topology capable of accepting either eight or 16 input channels, has been programmed and modified to incorporate more LANL-specific features such as improved peak detection, 24-bit time stamps, and 16-bit channel identification numbers which are all part of a 64-bit event record (2 by 32-bits wide). Using a backplane 10-MHz clock, timing resolution is /spl plusmn/50 ns. The module uses two, frame first-in-first-out buffers (FIFOs), each 2-kwords deep, to accumulate event data at up to 330 kEvents/sec during a frame until the host computer can read it out. One FIFO is read while the other is being filled. The module does not use the ANL token-passing configuration for accessing data. Rather, it uses direct logical-address and register-based addressing modes. To interface with analog signals from the neutron detectors, the module incorporates eight 72-pin single-inline-memory-module-size plug-in boards, called SIMs, which contain differential receivers, analog threshold comparators, and 8-bit analog-to-digital converters. A total of 16-analog channels are available if used in TOF mode, or eight channels if used in PSD mode.</description><identifier>ISSN: 0018-9499</identifier><identifier>EISSN: 1558-1578</identifier><identifier>DOI: 10.1109/23.846136</identifier><identifier>CODEN: IETNAE</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Backplanes ; Boards ; Channels ; Clocks ; Collaboration ; Comparators ; Event detection ; Field programmable analog arrays ; Field programmable gate arrays ; Frames ; Hardware ; Modules ; Neutrons ; Thresholds ; Timing ; Topology</subject><ispartof>IEEE transactions on nuclear science, 2000-04, Vol.47 (2), p.151-153</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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The LANL module, based on the ANL-developed hardware which uses field-programmable gate arrays (FPGAs) and analog-input-signal conditioning modules for a flexible topology capable of accepting either eight or 16 input channels, has been programmed and modified to incorporate more LANL-specific features such as improved peak detection, 24-bit time stamps, and 16-bit channel identification numbers which are all part of a 64-bit event record (2 by 32-bits wide). Using a backplane 10-MHz clock, timing resolution is /spl plusmn/50 ns. The module uses two, frame first-in-first-out buffers (FIFOs), each 2-kwords deep, to accumulate event data at up to 330 kEvents/sec during a frame until the host computer can read it out. One FIFO is read while the other is being filled. The module does not use the ANL token-passing configuration for accessing data. Rather, it uses direct logical-address and register-based addressing modes. To interface with analog signals from the neutron detectors, the module incorporates eight 72-pin single-inline-memory-module-size plug-in boards, called SIMs, which contain differential receivers, analog threshold comparators, and 8-bit analog-to-digital converters. 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The LANL module, based on the ANL-developed hardware which uses field-programmable gate arrays (FPGAs) and analog-input-signal conditioning modules for a flexible topology capable of accepting either eight or 16 input channels, has been programmed and modified to incorporate more LANL-specific features such as improved peak detection, 24-bit time stamps, and 16-bit channel identification numbers which are all part of a 64-bit event record (2 by 32-bits wide). Using a backplane 10-MHz clock, timing resolution is /spl plusmn/50 ns. The module uses two, frame first-in-first-out buffers (FIFOs), each 2-kwords deep, to accumulate event data at up to 330 kEvents/sec during a frame until the host computer can read it out. One FIFO is read while the other is being filled. The module does not use the ANL token-passing configuration for accessing data. Rather, it uses direct logical-address and register-based addressing modes. To interface with analog signals from the neutron detectors, the module incorporates eight 72-pin single-inline-memory-module-size plug-in boards, called SIMs, which contain differential receivers, analog threshold comparators, and 8-bit analog-to-digital converters. A total of 16-analog channels are available if used in TOF mode, or eight channels if used in PSD mode.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/23.846136</doi><tpages>3</tpages></addata></record> |
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subjects | Backplanes Boards Channels Clocks Collaboration Comparators Event detection Field programmable analog arrays Field programmable gate arrays Frames Hardware Modules Neutrons Thresholds Timing Topology |
title | The LANL Neutron-Science-Center time-of-flight/position-sensitive-detect module: status and progress |
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