An 8-b 100-MSample/s CMOS pipelined folding ADC

Although cascading reduces the number of folders used in folding analog-to-digital converters (ADCs), it demands wider bandwidth. The pipelining scheme proposed in this work greatly alleviates the wide bandwidth requirement of the folding amplifier. The pipelining is implemented with simple differen...

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Veröffentlicht in:	IEEE journal of solid-state circuits 2001-02, Vol.36 (2), p.184-194
Hauptverfasser:	Myung-Jun Choe, Bang-Sup Song, Bacrania, K.
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Amplifiers Analog-digital conversion Bandwidth CMOS CMOS analog integrated circuits Consumption Error correction codes Folding Image coding Interpolation Nonlinearity Pipeline processing Pipelining (computers) Preamplifiers Prototypes Signal processing algorithms
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