Front-end electronics for PHENIX time expansion chamber
Front-end electronics (FEE) has been developed for the PHENIX time expansion chamber (TEC), a multiwire tracking detector with over 20k readout channels. The FEE for the TEC consists of an analog preamplifier-shaping amplifier circuit board, a digital front-end module circuit board plus ancillary su...
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creator | Barish, K. Chang, W.C. Dietzsch, O. Ferdousi, T. Franz, A. Fried, J. Fung, S.Y. Gannon, J. Harder, J. Kandasamy, A. Kelley, M.A. Kotchetkov, D. Lebedev, A. Mahon, J. Mioduszewski, S. Muniruzzaman, M. Nandi, B. O'Brien, E. O'Connor, P. Pisani, R. Rankowitz, S. Rosati, M. Seto, R. Takagui, E.M. Von Achen, W. Wang, H.Q. Xie, W. |
description | Front-end electronics (FEE) has been developed for the PHENIX time expansion chamber (TEC), a multiwire tracking detector with over 20k readout channels. The FEE for the TEC consists of an analog preamplifier-shaping amplifier circuit board, a digital front-end module circuit board plus ancillary support boards for timing, control and communication. Signals from each chamber wire are sampled (/spl sim/40 MHz), digitized, buffered, and then formatted as 64 channel serial data packets to be transmitted via a 1-GHz optical link. Three custom ICs have been designed for this system: 1) octal preamplifier and shaping amplifier with tail cancellation and dual-gain for large dynamic range with full serial control of gain, shaping time and tail; 2) nonlinear 5-b flash ADC with 9-b dynamic range; 3) digital memory unit for programmable delay and memory depth. The FEE has been installed, commissioned, and operated in the PHENIX experiment at Brookhaven National Laboratory. |
doi_str_mv | 10.1109/TNS.2002.1039627 |
format | Article |
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The FEE for the TEC consists of an analog preamplifier-shaping amplifier circuit board, a digital front-end module circuit board plus ancillary support boards for timing, control and communication. Signals from each chamber wire are sampled (/spl sim/40 MHz), digitized, buffered, and then formatted as 64 channel serial data packets to be transmitted via a 1-GHz optical link. Three custom ICs have been designed for this system: 1) octal preamplifier and shaping amplifier with tail cancellation and dual-gain for large dynamic range with full serial control of gain, shaping time and tail; 2) nonlinear 5-b flash ADC with 9-b dynamic range; 3) digital memory unit for programmable delay and memory depth. The FEE has been installed, commissioned, and operated in the PHENIX experiment at Brookhaven National Laboratory.</description><identifier>ISSN: 0018-9499</identifier><identifier>EISSN: 1558-1578</identifier><identifier>DOI: 10.1109/TNS.2002.1039627</identifier><identifier>CODEN: IETNAE</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Amplifiers ; Chambers ; Channels ; Circuit boards ; Communication system control ; Detectors ; Digital ; Dynamic range ; Electronics ; Optical amplifiers ; Optical buffering ; Optical fiber communication ; Printed circuits ; Serials ; Tail ; Timing ; Wire</subject><ispartof>IEEE transactions on nuclear science, 2002-06, Vol.49 (3), p.1141-1146</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2002</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c351t-c92da77dd0a47c3be081e3ea303748775bb31c74545e34840f3f6f04e0c6d44a3</citedby><cites>FETCH-LOGICAL-c351t-c92da77dd0a47c3be081e3ea303748775bb31c74545e34840f3f6f04e0c6d44a3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1039627$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1039627$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Barish, K.</creatorcontrib><creatorcontrib>Chang, W.C.</creatorcontrib><creatorcontrib>Dietzsch, O.</creatorcontrib><creatorcontrib>Ferdousi, T.</creatorcontrib><creatorcontrib>Franz, A.</creatorcontrib><creatorcontrib>Fried, J.</creatorcontrib><creatorcontrib>Fung, S.Y.</creatorcontrib><creatorcontrib>Gannon, J.</creatorcontrib><creatorcontrib>Harder, J.</creatorcontrib><creatorcontrib>Kandasamy, A.</creatorcontrib><creatorcontrib>Kelley, M.A.</creatorcontrib><creatorcontrib>Kotchetkov, D.</creatorcontrib><creatorcontrib>Lebedev, A.</creatorcontrib><creatorcontrib>Mahon, J.</creatorcontrib><creatorcontrib>Mioduszewski, S.</creatorcontrib><creatorcontrib>Muniruzzaman, M.</creatorcontrib><creatorcontrib>Nandi, B.</creatorcontrib><creatorcontrib>O'Brien, E.</creatorcontrib><creatorcontrib>O'Connor, P.</creatorcontrib><creatorcontrib>Pisani, R.</creatorcontrib><creatorcontrib>Rankowitz, S.</creatorcontrib><creatorcontrib>Rosati, M.</creatorcontrib><creatorcontrib>Seto, R.</creatorcontrib><creatorcontrib>Takagui, E.M.</creatorcontrib><creatorcontrib>Von Achen, W.</creatorcontrib><creatorcontrib>Wang, H.Q.</creatorcontrib><creatorcontrib>Xie, W.</creatorcontrib><title>Front-end electronics for PHENIX time expansion chamber</title><title>IEEE transactions on nuclear science</title><addtitle>TNS</addtitle><description>Front-end electronics (FEE) has been developed for the PHENIX time expansion chamber (TEC), a multiwire tracking detector with over 20k readout channels. The FEE for the TEC consists of an analog preamplifier-shaping amplifier circuit board, a digital front-end module circuit board plus ancillary support boards for timing, control and communication. Signals from each chamber wire are sampled (/spl sim/40 MHz), digitized, buffered, and then formatted as 64 channel serial data packets to be transmitted via a 1-GHz optical link. Three custom ICs have been designed for this system: 1) octal preamplifier and shaping amplifier with tail cancellation and dual-gain for large dynamic range with full serial control of gain, shaping time and tail; 2) nonlinear 5-b flash ADC with 9-b dynamic range; 3) digital memory unit for programmable delay and memory depth. The FEE has been installed, commissioned, and operated in the PHENIX experiment at Brookhaven National Laboratory.</description><subject>Amplifiers</subject><subject>Chambers</subject><subject>Channels</subject><subject>Circuit boards</subject><subject>Communication system control</subject><subject>Detectors</subject><subject>Digital</subject><subject>Dynamic range</subject><subject>Electronics</subject><subject>Optical amplifiers</subject><subject>Optical buffering</subject><subject>Optical fiber communication</subject><subject>Printed circuits</subject><subject>Serials</subject><subject>Tail</subject><subject>Timing</subject><subject>Wire</subject><issn>0018-9499</issn><issn>1558-1578</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2002</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNp9kMFLwzAUh4MoOKd3wUvxoKfOlyZpkqOMzQ3GFJzgLaTpK3Zs7Uw60P_ejO4gHjw9frzv9-B9hFxTGFEK-mG1fB1lANmIAtN5Jk_IgAqhUiqkOiUDAKpSzbU-JxchrGPkAsSAyKlvmy7Fpkxwg66LqXYhqVqfvMwmy_l70tVbTPBrZ5tQt03iPuy2QH9Jziq7CXh1nEPyNp2sxrN08fw0Hz8uUscE7VKns9JKWZZguXSsQFAUGVoGTHIlpSgKRp3kggtkXHGoWJVXwBFcXnJu2ZDc93d3vv3cY-jMtg4ONxvbYLsPRoPUTMdDkbz7l8xUpqhmNIK3f8B1u_dN_MJozaKZPFMRgh5yvg3BY2V2vt5a_20omINwE4Wbg3BzFB4rN32lRsRfeL_9AdveeaI</recordid><startdate>20020601</startdate><enddate>20020601</enddate><creator>Barish, K.</creator><creator>Chang, W.C.</creator><creator>Dietzsch, O.</creator><creator>Ferdousi, T.</creator><creator>Franz, A.</creator><creator>Fried, J.</creator><creator>Fung, S.Y.</creator><creator>Gannon, J.</creator><creator>Harder, J.</creator><creator>Kandasamy, A.</creator><creator>Kelley, M.A.</creator><creator>Kotchetkov, D.</creator><creator>Lebedev, A.</creator><creator>Mahon, J.</creator><creator>Mioduszewski, S.</creator><creator>Muniruzzaman, M.</creator><creator>Nandi, B.</creator><creator>O'Brien, E.</creator><creator>O'Connor, P.</creator><creator>Pisani, R.</creator><creator>Rankowitz, S.</creator><creator>Rosati, M.</creator><creator>Seto, R.</creator><creator>Takagui, E.M.</creator><creator>Von Achen, W.</creator><creator>Wang, H.Q.</creator><creator>Xie, W.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7QF</scope><scope>7QL</scope><scope>7QQ</scope><scope>7SC</scope><scope>7SE</scope><scope>7SP</scope><scope>7SR</scope><scope>7T7</scope><scope>7TA</scope><scope>7TB</scope><scope>7U5</scope><scope>7U9</scope><scope>8BQ</scope><scope>8FD</scope><scope>C1K</scope><scope>F28</scope><scope>FR3</scope><scope>H8D</scope><scope>H94</scope><scope>JG9</scope><scope>JQ2</scope><scope>KR7</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>M7N</scope><scope>P64</scope></search><sort><creationdate>20020601</creationdate><title>Front-end electronics for PHENIX time expansion chamber</title><author>Barish, K. ; Chang, W.C. ; Dietzsch, O. ; Ferdousi, T. ; Franz, A. ; Fried, J. ; Fung, S.Y. ; Gannon, J. ; Harder, J. ; Kandasamy, A. ; Kelley, M.A. ; Kotchetkov, D. ; Lebedev, A. ; Mahon, J. ; Mioduszewski, S. ; Muniruzzaman, M. ; Nandi, B. ; O'Brien, E. ; O'Connor, P. ; Pisani, R. ; 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E.M.</creatorcontrib><creatorcontrib>Von Achen, W.</creatorcontrib><creatorcontrib>Wang, H.Q.</creatorcontrib><creatorcontrib>Xie, W.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Aluminium Industry Abstracts</collection><collection>Bacteriology Abstracts (Microbiology B)</collection><collection>Ceramic Abstracts</collection><collection>Computer and Information Systems Abstracts</collection><collection>Corrosion Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Engineered Materials Abstracts</collection><collection>Industrial and Applied Microbiology Abstracts (Microbiology A)</collection><collection>Materials Business File</collection><collection>Mechanical & Transportation Engineering Abstracts</collection><collection>Solid State and Superconductivity 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Abstracts</collection><jtitle>IEEE transactions on nuclear science</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Barish, K.</au><au>Chang, W.C.</au><au>Dietzsch, O.</au><au>Ferdousi, T.</au><au>Franz, A.</au><au>Fried, J.</au><au>Fung, S.Y.</au><au>Gannon, J.</au><au>Harder, J.</au><au>Kandasamy, A.</au><au>Kelley, M.A.</au><au>Kotchetkov, D.</au><au>Lebedev, A.</au><au>Mahon, J.</au><au>Mioduszewski, S.</au><au>Muniruzzaman, M.</au><au>Nandi, B.</au><au>O'Brien, E.</au><au>O'Connor, P.</au><au>Pisani, R.</au><au>Rankowitz, S.</au><au>Rosati, M.</au><au>Seto, R.</au><au>Takagui, E.M.</au><au>Von Achen, W.</au><au>Wang, H.Q.</au><au>Xie, W.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Front-end electronics for PHENIX time expansion chamber</atitle><jtitle>IEEE transactions on nuclear science</jtitle><stitle>TNS</stitle><date>2002-06-01</date><risdate>2002</risdate><volume>49</volume><issue>3</issue><spage>1141</spage><epage>1146</epage><pages>1141-1146</pages><issn>0018-9499</issn><eissn>1558-1578</eissn><coden>IETNAE</coden><abstract>Front-end electronics (FEE) has been developed for the PHENIX time expansion chamber (TEC), a multiwire tracking detector with over 20k readout channels. The FEE for the TEC consists of an analog preamplifier-shaping amplifier circuit board, a digital front-end module circuit board plus ancillary support boards for timing, control and communication. Signals from each chamber wire are sampled (/spl sim/40 MHz), digitized, buffered, and then formatted as 64 channel serial data packets to be transmitted via a 1-GHz optical link. Three custom ICs have been designed for this system: 1) octal preamplifier and shaping amplifier with tail cancellation and dual-gain for large dynamic range with full serial control of gain, shaping time and tail; 2) nonlinear 5-b flash ADC with 9-b dynamic range; 3) digital memory unit for programmable delay and memory depth. The FEE has been installed, commissioned, and operated in the PHENIX experiment at Brookhaven National Laboratory.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TNS.2002.1039627</doi><tpages>6</tpages></addata></record> |
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subjects | Amplifiers Chambers Channels Circuit boards Communication system control Detectors Digital Dynamic range Electronics Optical amplifiers Optical buffering Optical fiber communication Printed circuits Serials Tail Timing Wire |
title | Front-end electronics for PHENIX time expansion chamber |
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