Origin of the Asymmetry in the Magnitude of the Statistical Variability of n- and p-Channel Poly-Si Gate Bulk MOSFETs

We present measurements for the standard deviation of the threshold voltage in n- and p-channel MOSFETs from the 45-nm low-power platform of STMicroelectronics. The measurements are compared with 3-D statistical simulations carried out with the Glasgow ldquoatomisticrdquo device simulator, considering random discrete dopants, line edge roughness, and the polysilicon granularity of the gate electrode. It was found that the surface potential pinning at the poly-Si grain boundaries (GBs), which is important for explaining the magnitude of the statistical variability of the n-channel MOSFETs, plays a negligible role in the p-channel case. First-principle simulation of low-angle silicon GBs is performed in order to explain the systematically observed differences in the threshold voltage standard deviation of the measured n- and p-channel MOSFETs.