A Low-Power CMOS Linear-in-Decibel Variable Gain Amplifier With Programmable Bandwidth and Stable Group Delay
This brief presents a new circuit architecture for linear-in-decibel, constant-bandwidth variable gain amplifier (VGA). To obtain high linearity under low-voltage operation, this VGA is a closed-loop structure. In loop amplifier design, two techniques are applied: first, the loop amplifier is given...
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Veröffentlicht in: | IEEE transactions on circuits and systems. 2, Analog and digital signal processing Analog and digital signal processing, 2006-12, Vol.53 (12), p.1436-1440 |
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creator | Tsou, S.-C. Chin-Fu Li Po-Chiun Huang |
description | This brief presents a new circuit architecture for linear-in-decibel, constant-bandwidth variable gain amplifier (VGA). To obtain high linearity under low-voltage operation, this VGA is a closed-loop structure. In loop amplifier design, two techniques are applied: first, the loop amplifier is given finite input impedance. This arrangement keeps the VGA bandwidth constant under different gain setting. Second, a current-buffered compensation is applied for loop stability. Compared to the Miller compensation, this method achieves wider bandwidth. The prototype chip using 0.18-mum CMOS technology demonstrates that -10- to 20-dB gain and 0.5- to 30-MHz bandwidth can be programmed independently. The group delay difference within 30-dB gain control range is smaller than 1%. The total circuit dissipates 1.35 mA from a 1.8-V supply |
doi_str_mv | 10.1109/TCSII.2006.885399 |
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To obtain high linearity under low-voltage operation, this VGA is a closed-loop structure. In loop amplifier design, two techniques are applied: first, the loop amplifier is given finite input impedance. This arrangement keeps the VGA bandwidth constant under different gain setting. Second, a current-buffered compensation is applied for loop stability. Compared to the Miller compensation, this method achieves wider bandwidth. The prototype chip using 0.18-mum CMOS technology demonstrates that -10- to 20-dB gain and 0.5- to 30-MHz bandwidth can be programmed independently. The group delay difference within 30-dB gain control range is smaller than 1%. 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(IEEE) 2006</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c324t-db86ee41ad038dc6ade743b2c08e7f85a16779acbd49b2d7dc4ff328bfa4866e3</citedby><cites>FETCH-LOGICAL-c324t-db86ee41ad038dc6ade743b2c08e7f85a16779acbd49b2d7dc4ff328bfa4866e3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4033171$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4033171$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Tsou, S.-C.</creatorcontrib><creatorcontrib>Chin-Fu Li</creatorcontrib><creatorcontrib>Po-Chiun Huang</creatorcontrib><title>A Low-Power CMOS Linear-in-Decibel Variable Gain Amplifier With Programmable Bandwidth and Stable Group Delay</title><title>IEEE transactions on circuits and systems. 2, Analog and digital signal processing</title><addtitle>TCSII</addtitle><description>This brief presents a new circuit architecture for linear-in-decibel, constant-bandwidth variable gain amplifier (VGA). To obtain high linearity under low-voltage operation, this VGA is a closed-loop structure. In loop amplifier design, two techniques are applied: first, the loop amplifier is given finite input impedance. This arrangement keeps the VGA bandwidth constant under different gain setting. Second, a current-buffered compensation is applied for loop stability. Compared to the Miller compensation, this method achieves wider bandwidth. The prototype chip using 0.18-mum CMOS technology demonstrates that -10- to 20-dB gain and 0.5- to 30-MHz bandwidth can be programmed independently. The group delay difference within 30-dB gain control range is smaller than 1%. The total circuit dissipates 1.35 mA from a 1.8-V supply</description><subject>Amplification</subject><subject>Amplifiers</subject><subject>Bandwidth</subject><subject>Circuit stability</subject><subject>Circuit topology</subject><subject>Circuits</subject><subject>CMOS integrated circuit</subject><subject>CMOS technology</subject><subject>Compensation</subject><subject>Delay</subject><subject>Gain</subject><subject>Gain control</subject><subject>Group delay</subject><subject>Impedance</subject><subject>Integrated circuit technology</subject><subject>linear-in-decibel variable gain amplifier (VGA)</subject><subject>Linearity</subject><subject>Prototypes</subject><subject>Variable gain</subject><issn>1549-7747</issn><issn>1057-7130</issn><issn>1558-3791</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2006</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkE1Lw0AQhoMoWKs_QLwsXjyl7leyu8faai1EWmjV47LJTnRLvty0lP57UyMePM3L8LzD8ATBNcEjQrC6X09W8_mIYhyPpIyYUifBgESRDJlQ5PSYuQqF4OI8uGjbDcZUYUYHQTlGSb0Pl_UePJq8LFYocRUYH7oqnELmUijQm_HOpAWgmXEVGpdN4XLX4e9u-4mWvv7wpix_gAdT2b2z3boLaLXtW77eNWgKhTlcBme5KVq4-p3D4PXpcT15DpPFbD4ZJ2HGKN-GNpUxACfGYiZtFhsLgrOUZliCyGVkSCyEMllquUqpFTbjec6oTHPDZRwDGwZ3_d3G1187aLe6dG0GRWEqqHetllJxSqMo6sjbf-Sm3vmqe04rQgnHTMQdRHoo83Xbesh1411p_EETrI_69Y9-fdSve_1d56bvOAD447t7jAjCvgHOtIEG</recordid><startdate>20061201</startdate><enddate>20061201</enddate><creator>Tsou, S.-C.</creator><creator>Chin-Fu Li</creator><creator>Po-Chiun Huang</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20061201</creationdate><title>A Low-Power CMOS Linear-in-Decibel Variable Gain Amplifier With Programmable Bandwidth and Stable Group Delay</title><author>Tsou, S.-C. ; Chin-Fu Li ; Po-Chiun Huang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c324t-db86ee41ad038dc6ade743b2c08e7f85a16779acbd49b2d7dc4ff328bfa4866e3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2006</creationdate><topic>Amplification</topic><topic>Amplifiers</topic><topic>Bandwidth</topic><topic>Circuit stability</topic><topic>Circuit topology</topic><topic>Circuits</topic><topic>CMOS integrated circuit</topic><topic>CMOS technology</topic><topic>Compensation</topic><topic>Delay</topic><topic>Gain</topic><topic>Gain control</topic><topic>Group delay</topic><topic>Impedance</topic><topic>Integrated circuit technology</topic><topic>linear-in-decibel variable gain amplifier (VGA)</topic><topic>Linearity</topic><topic>Prototypes</topic><topic>Variable gain</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Tsou, S.-C.</creatorcontrib><creatorcontrib>Chin-Fu Li</creatorcontrib><creatorcontrib>Po-Chiun Huang</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on circuits and systems. 2, Analog and digital signal processing</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tsou, S.-C.</au><au>Chin-Fu Li</au><au>Po-Chiun Huang</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Low-Power CMOS Linear-in-Decibel Variable Gain Amplifier With Programmable Bandwidth and Stable Group Delay</atitle><jtitle>IEEE transactions on circuits and systems. 2, Analog and digital signal processing</jtitle><stitle>TCSII</stitle><date>2006-12-01</date><risdate>2006</risdate><volume>53</volume><issue>12</issue><spage>1436</spage><epage>1440</epage><pages>1436-1440</pages><issn>1549-7747</issn><issn>1057-7130</issn><eissn>1558-3791</eissn><coden>ICSPE5</coden><abstract>This brief presents a new circuit architecture for linear-in-decibel, constant-bandwidth variable gain amplifier (VGA). To obtain high linearity under low-voltage operation, this VGA is a closed-loop structure. In loop amplifier design, two techniques are applied: first, the loop amplifier is given finite input impedance. This arrangement keeps the VGA bandwidth constant under different gain setting. Second, a current-buffered compensation is applied for loop stability. Compared to the Miller compensation, this method achieves wider bandwidth. The prototype chip using 0.18-mum CMOS technology demonstrates that -10- to 20-dB gain and 0.5- to 30-MHz bandwidth can be programmed independently. The group delay difference within 30-dB gain control range is smaller than 1%. The total circuit dissipates 1.35 mA from a 1.8-V supply</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TCSII.2006.885399</doi><tpages>5</tpages></addata></record> |
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source | IEEE Electronic Library (IEL) |
subjects | Amplification Amplifiers Bandwidth Circuit stability Circuit topology Circuits CMOS integrated circuit CMOS technology Compensation Delay Gain Gain control Group delay Impedance Integrated circuit technology linear-in-decibel variable gain amplifier (VGA) Linearity Prototypes Variable gain |
title | A Low-Power CMOS Linear-in-Decibel Variable Gain Amplifier With Programmable Bandwidth and Stable Group Delay |
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