A CMOS STI-Bound Single-Photon Avalanche Diode With 27-ps Timing Resolution and a Reduced Diffusion Tail

Single-photon avalanche diodes (SPADs) measure individual photons' time of arrival. Low detector jitter is required in many SPAD applications. This letter describes a method for significantly reducing SPAD jitter using an area-efficient shallow-trench-isolation guard ring. The structure prevent...

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Veröffentlicht in:IEEE electron device letters 2009-06, Vol.30 (6), p.641-643
Hauptverfasser: Hsu, M.J., Esener, S.C., Finkelstein, H.
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Esener, S.C.
Finkelstein, H.
description Single-photon avalanche diodes (SPADs) measure individual photons' time of arrival. Low detector jitter is required in many SPAD applications. This letter describes a method for significantly reducing SPAD jitter using an area-efficient shallow-trench-isolation guard ring. The structure prevents lateral drift and diffusion of charge carriers, resulting in improved timing resolution. Experimental results of the device, fabricated in a 0.18-mum CMOS technology, are presented. The timing resolution of the SPAD is 27-ps full-width at half-maximum. Importantly, the diffusion tail exhibits only 96-ps full-width at hundredth-maximum, a three times improvement over previously published SPAD results. The reduced jitter can be translated to improved bit error rates in quantum key distribution systems, faster bit rates in pulse position modulation optical links, and greater contrast in high-resolution fluorescence lifetime imaging microscopy.
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Low detector jitter is required in many SPAD applications. This letter describes a method for significantly reducing SPAD jitter using an area-efficient shallow-trench-isolation guard ring. The structure prevents lateral drift and diffusion of charge carriers, resulting in improved timing resolution. Experimental results of the device, fabricated in a 0.18-mum CMOS technology, are presented. The timing resolution of the SPAD is 27-ps full-width at half-maximum. Importantly, the diffusion tail exhibits only 96-ps full-width at hundredth-maximum, a three times improvement over previously published SPAD results. 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Low detector jitter is required in many SPAD applications. This letter describes a method for significantly reducing SPAD jitter using an area-efficient shallow-trench-isolation guard ring. The structure prevents lateral drift and diffusion of charge carriers, resulting in improved timing resolution. Experimental results of the device, fabricated in a 0.18-mum CMOS technology, are presented. The timing resolution of the SPAD is 27-ps full-width at half-maximum. Importantly, the diffusion tail exhibits only 96-ps full-width at hundredth-maximum, a three times improvement over previously published SPAD results. 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identifier ISSN: 0741-3106
ispartof IEEE electron device letters, 2009-06, Vol.30 (6), p.641-643
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source IEEE Electronic Library (IEL)
subjects Applied sciences
Avalanche breakdown
Avalanche diodes
avalanche photodiodes
Charge carriers
CMOS
CMOS technology
cryptography
Design. Technologies. Operation analysis. Testing
Detectors
Devices
Diffusion
Diodes
Electronics
Exact sciences and technology
fluorescence
General equipment and techniques
Guards
Instruments, apparatus, components and techniques common to several branches of physics and astronomy
Integrated circuits
Jitter
Optical microscopy
Optoelectronic devices
Physics
Pulse modulation
Pulse position modulation
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Sensors (chemical, optical, electrical, movement, gas, etc.)
remote sensing
silicon radiation detectors
Tail
Time measurement
Time measurements
Timing
title A CMOS STI-Bound Single-Photon Avalanche Diode With 27-ps Timing Resolution and a Reduced Diffusion Tail
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