GPUs and the Future of Parallel Computing
This article discusses the capabilities of state-of-the art GPU-based high-throughput computing systems and considers the challenges to scaling single-chip parallel-computing systems, highlighting high-impact areas that the computing research community can address. Nvidia Research is investigating a...
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Veröffentlicht in: | IEEE MICRO 2011-09, Vol.31 (5), p.7-17 |
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creator | Keckler, S. W. Dally, W. J. Khailany, B. Garland, M. Glasco, D. |
description | This article discusses the capabilities of state-of-the art GPU-based high-throughput computing systems and considers the challenges to scaling single-chip parallel-computing systems, highlighting high-impact areas that the computing research community can address. Nvidia Research is investigating an architecture for a heterogeneous high-performance computing system that seeks to address these challenges. |
doi_str_mv | 10.1109/MM.2011.89 |
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fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_journals_900432329</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6045685</ieee_id><sourcerecordid>963839482</sourcerecordid><originalsourceid>FETCH-LOGICAL-c351t-b8dad1c349122aa44779a9f4812bcaca9e5f6a4f0ab6cae8fce8728d7393c3cf3</originalsourceid><addsrcrecordid>eNpd0DFPwzAUBGALgUQpLKwsEQsCKcX2cxJ7RBUtSI3oQGfr1XmGVGlS7GTg39OqiIHplk-n0zF2LfhECG4ey3IiuRATbU7YSBgoUiUUnLIRl4VMRQHynF3EuOGcZ5LrEbufL1cxwbZK-k9KZkM_BEo6nywxYNNQk0y77W7o6_bjkp15bCJd_eaYrWbP79OXdPE2f50-LVIHmejTta6wEg6UEVIiKlUUBo1XWsi1Q4eGMp-j8hzXuUPS3pEupK4KMODAeRizu2PvLnRfA8XebuvoqGmwpW6I1uSgwSgt9_L2n9x0Q2j346zhXIEEafbo4Yhc6GIM5O0u1FsM31Zwe_jMlqU9fGb1Ad8ccU1EfzDnKst1Bj8aeGVi</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>900432329</pqid></control><display><type>article</type><title>GPUs and the Future of Parallel Computing</title><source>IEEE Electronic Library (IEL)</source><creator>Keckler, S. W. ; Dally, W. J. ; Khailany, B. ; Garland, M. ; Glasco, D.</creator><creatorcontrib>Keckler, S. W. ; Dally, W. J. ; Khailany, B. ; Garland, M. ; Glasco, D.</creatorcontrib><description>This article discusses the capabilities of state-of-the art GPU-based high-throughput computing systems and considers the challenges to scaling single-chip parallel-computing systems, highlighting high-impact areas that the computing research community can address. Nvidia Research is investigating an architecture for a heterogeneous high-performance computing system that seeks to address these challenges.</description><identifier>ISSN: 0272-1732</identifier><identifier>EISSN: 1937-4143</identifier><identifier>DOI: 10.1109/MM.2011.89</identifier><identifier>CODEN: IEMIDZ</identifier><language>eng</language><publisher>Los Alamitos: IEEE</publisher><subject>Architecture ; Communities ; Computation ; Computer architecture ; energy-efficient computing ; GPU ; Graphics processing unit ; High performance computing ; Microprocessors ; Next generation networking ; Parallel processing ; Parallel programming ; Parallel-computer architecture ; Throughput</subject><ispartof>IEEE MICRO, 2011-09, Vol.31 (5), p.7-17</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Sep/Oct 2011</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c351t-b8dad1c349122aa44779a9f4812bcaca9e5f6a4f0ab6cae8fce8728d7393c3cf3</citedby><cites>FETCH-LOGICAL-c351t-b8dad1c349122aa44779a9f4812bcaca9e5f6a4f0ab6cae8fce8728d7393c3cf3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6045685$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6045685$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Keckler, S. W.</creatorcontrib><creatorcontrib>Dally, W. J.</creatorcontrib><creatorcontrib>Khailany, B.</creatorcontrib><creatorcontrib>Garland, M.</creatorcontrib><creatorcontrib>Glasco, D.</creatorcontrib><title>GPUs and the Future of Parallel Computing</title><title>IEEE MICRO</title><addtitle>MM</addtitle><description>This article discusses the capabilities of state-of-the art GPU-based high-throughput computing systems and considers the challenges to scaling single-chip parallel-computing systems, highlighting high-impact areas that the computing research community can address. Nvidia Research is investigating an architecture for a heterogeneous high-performance computing system that seeks to address these challenges.</description><subject>Architecture</subject><subject>Communities</subject><subject>Computation</subject><subject>Computer architecture</subject><subject>energy-efficient computing</subject><subject>GPU</subject><subject>Graphics processing unit</subject><subject>High performance computing</subject><subject>Microprocessors</subject><subject>Next generation networking</subject><subject>Parallel processing</subject><subject>Parallel programming</subject><subject>Parallel-computer architecture</subject><subject>Throughput</subject><issn>0272-1732</issn><issn>1937-4143</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2011</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpd0DFPwzAUBGALgUQpLKwsEQsCKcX2cxJ7RBUtSI3oQGfr1XmGVGlS7GTg39OqiIHplk-n0zF2LfhECG4ey3IiuRATbU7YSBgoUiUUnLIRl4VMRQHynF3EuOGcZ5LrEbufL1cxwbZK-k9KZkM_BEo6nywxYNNQk0y77W7o6_bjkp15bCJd_eaYrWbP79OXdPE2f50-LVIHmejTta6wEg6UEVIiKlUUBo1XWsi1Q4eGMp-j8hzXuUPS3pEupK4KMODAeRizu2PvLnRfA8XebuvoqGmwpW6I1uSgwSgt9_L2n9x0Q2j346zhXIEEafbo4Yhc6GIM5O0u1FsM31Zwe_jMlqU9fGb1Ad8ccU1EfzDnKst1Bj8aeGVi</recordid><startdate>201109</startdate><enddate>201109</enddate><creator>Keckler, S. W.</creator><creator>Dally, W. J.</creator><creator>Khailany, B.</creator><creator>Garland, M.</creator><creator>Glasco, D.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>201109</creationdate><title>GPUs and the Future of Parallel Computing</title><author>Keckler, S. W. ; Dally, W. J. ; Khailany, B. ; Garland, M. ; Glasco, D.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c351t-b8dad1c349122aa44779a9f4812bcaca9e5f6a4f0ab6cae8fce8728d7393c3cf3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Architecture</topic><topic>Communities</topic><topic>Computation</topic><topic>Computer architecture</topic><topic>energy-efficient computing</topic><topic>GPU</topic><topic>Graphics processing unit</topic><topic>High performance computing</topic><topic>Microprocessors</topic><topic>Next generation networking</topic><topic>Parallel processing</topic><topic>Parallel programming</topic><topic>Parallel-computer architecture</topic><topic>Throughput</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Keckler, S. W.</creatorcontrib><creatorcontrib>Dally, W. J.</creatorcontrib><creatorcontrib>Khailany, B.</creatorcontrib><creatorcontrib>Garland, M.</creatorcontrib><creatorcontrib>Glasco, D.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE MICRO</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Keckler, S. W.</au><au>Dally, W. J.</au><au>Khailany, B.</au><au>Garland, M.</au><au>Glasco, D.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>GPUs and the Future of Parallel Computing</atitle><jtitle>IEEE MICRO</jtitle><stitle>MM</stitle><date>2011-09</date><risdate>2011</risdate><volume>31</volume><issue>5</issue><spage>7</spage><epage>17</epage><pages>7-17</pages><issn>0272-1732</issn><eissn>1937-4143</eissn><coden>IEMIDZ</coden><abstract>This article discusses the capabilities of state-of-the art GPU-based high-throughput computing systems and considers the challenges to scaling single-chip parallel-computing systems, highlighting high-impact areas that the computing research community can address. Nvidia Research is investigating an architecture for a heterogeneous high-performance computing system that seeks to address these challenges.</abstract><cop>Los Alamitos</cop><pub>IEEE</pub><doi>10.1109/MM.2011.89</doi><tpages>11</tpages></addata></record> |
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subjects | Architecture Communities Computation Computer architecture energy-efficient computing GPU Graphics processing unit High performance computing Microprocessors Next generation networking Parallel processing Parallel programming Parallel-computer architecture Throughput |
title | GPUs and the Future of Parallel Computing |
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