Bit-parallel systolic multipliers for GF(2/sup m/) fields defined by all-one and equally spaced polynomials

Two operations, the cyclic shifting and the inner product, are defined by the properties of irreducible all one polynomials. An effective algorithm is proposed for computing multiplications over a class of fields GF(2/sup m/) using the two operations. Then, two low-complexity bit-parallel systolic m...

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Veröffentlicht in:	IEEE transactions on computers 2001-05, Vol.50 (5), p.385-393
Hauptverfasser:	Lee, Chiou-Yng, Lu, Erl-Huei, Lee, Jau-Yien
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Arithmetic Circuits Computation Computer architecture Cryptography Delay Electrostatic precipitators Error correction Galois fields Gates Latches Multiplication Multipliers Polynomials Propagation delay Roots Studies
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