Static power modeling of 32-bit microprocessors
The paper presents a novel strategy aimed at modeling instruction energy consumption of 32-bit microprocessors. Different from former approaches, the proposed instruction-level power model is founded on a functional decomposition of the activities accomplished by a generic microprocessor. The propos...
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Veröffentlicht in: | IEEE transactions on computer-aided design of integrated circuits and systems 2002-11, Vol.21 (11), p.1306-1316 |
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container_title | IEEE transactions on computer-aided design of integrated circuits and systems |
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creator | Brandolese, C. Salice, F. Fornaciari, W. Sciuto, D. |
description | The paper presents a novel strategy aimed at modeling instruction energy consumption of 32-bit microprocessors. Different from former approaches, the proposed instruction-level power model is founded on a functional decomposition of the activities accomplished by a generic microprocessor. The proposed model has significant generalization capabilities. It allows estimation of the power figures of the entire instruction-set starting from the analysis of a subset, as well as to power characterize new processors by using the model obtained by considering other microprocessors. The model is formally presented and justified and its actual application over five commercial microprocessors is included. This static characterization is the basic information for system-level power modeling of hardware/software architectures. |
doi_str_mv | 10.1109/TCAD.2002.804104 |
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Different from former approaches, the proposed instruction-level power model is founded on a functional decomposition of the activities accomplished by a generic microprocessor. The proposed model has significant generalization capabilities. It allows estimation of the power figures of the entire instruction-set starting from the analysis of a subset, as well as to power characterize new processors by using the model obtained by considering other microprocessors. The model is formally presented and justified and its actual application over five commercial microprocessors is included. This static characterization is the basic information for system-level power modeling of hardware/software architectures.</description><subject>Application software</subject><subject>Computer aided design</subject><subject>Computer programs</subject><subject>Costs</subject><subject>Design engineering</subject><subject>Embedded software</subject><subject>Energy consumption</subject><subject>Hardware</subject><subject>Microprocessors</subject><subject>Power system modeling</subject><subject>Processors</subject><subject>Software</subject><subject>Software architecture</subject><subject>Strategy</subject><subject>Time to market</subject><issn>0278-0070</issn><issn>1937-4151</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2002</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkD1PwzAQhi0EEqWwI7FELExp7_xR22NVPqVKDJTZchwHpUrqYqdC_HtchQEx3fK8d_c-hFwjzBBBzzer5f2MAtCZAo7AT8gENZMlR4GnZAJUqhJAwjm5SGkLgFxQPSHzt8EOrSv24cvHog-179rdRxGagtGyaoeib10M-xicTynEdEnOGtslf_U7p-T98WGzei7Xr08vq-W6dGxBh7ISIBeVbRivUHtdKdACoOZMUMe51Q5oDQwaTlEsHK2YlegkU5LVWtnMTcnduDef_jz4NJi-Tc53nd35cEhGg8pdlRSZvP1HbsMh7vJzRinOFVKJGYIRymVSir4x-9j2Nn4bBHP0Z47-zNGfGf3lyM0Yab33f3AugWv2A4UKaMw</recordid><startdate>20021101</startdate><enddate>20021101</enddate><creator>Brandolese, C.</creator><creator>Salice, F.</creator><creator>Fornaciari, W.</creator><creator>Sciuto, D.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20021101</creationdate><title>Static power modeling of 32-bit microprocessors</title><author>Brandolese, C. ; Salice, F. ; Fornaciari, W. ; Sciuto, D.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c362t-b5076baf34b19e9b809500d4352c44a9c02d030f42156c2b3a71c73873d98ad43</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2002</creationdate><topic>Application software</topic><topic>Computer aided design</topic><topic>Computer programs</topic><topic>Costs</topic><topic>Design engineering</topic><topic>Embedded software</topic><topic>Energy consumption</topic><topic>Hardware</topic><topic>Microprocessors</topic><topic>Power system modeling</topic><topic>Processors</topic><topic>Software</topic><topic>Software architecture</topic><topic>Strategy</topic><topic>Time to market</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Brandolese, C.</creatorcontrib><creatorcontrib>Salice, F.</creatorcontrib><creatorcontrib>Fornaciari, W.</creatorcontrib><creatorcontrib>Sciuto, D.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Brandolese, C.</au><au>Salice, F.</au><au>Fornaciari, W.</au><au>Sciuto, D.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Static power modeling of 32-bit microprocessors</atitle><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle><stitle>TCAD</stitle><date>2002-11-01</date><risdate>2002</risdate><volume>21</volume><issue>11</issue><spage>1306</spage><epage>1316</epage><pages>1306-1316</pages><issn>0278-0070</issn><eissn>1937-4151</eissn><coden>ITCSDI</coden><abstract>The paper presents a novel strategy aimed at modeling instruction energy consumption of 32-bit microprocessors. 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subjects | Application software Computer aided design Computer programs Costs Design engineering Embedded software Energy consumption Hardware Microprocessors Power system modeling Processors Software Software architecture Strategy Time to market |
title | Static power modeling of 32-bit microprocessors |
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