On the behavior of PHM distributed schedulers for input buffered packet switches
iSLIP and parallel hierarchical matching (PHM) are distributed maximal size matching schedulers for input-buffered switches. Previous research has analyzed the hardware cost of those schedulers and their performance after a small number of iterations. In this paper, we formulate an upper bound for t...
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| Veröffentlicht in: | IEEE transactions on communications 2003-07, Vol.51 (7), p.1057-1060 |
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| container_title | IEEE transactions on communications |
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| creator | Asorey-Cacheda, R. Gonzalez-Castano, F.J. Lopez-Bravo, C. Pousada-Carballo, J.M. Rodriguez-Hernandez, P.S. |
| description | iSLIP and parallel hierarchical matching (PHM) are distributed maximal size matching schedulers for input-buffered switches. Previous research has analyzed the hardware cost of those schedulers and their performance after a small number of iterations. In this paper, we formulate an upper bound for the number of iterations required by PHM to converge. Then, we compare the number of iterations required by iSLIP and PHM to achieve a maximal throughput under uniform Bernoulli traffic, by means of simulation. Finally, we obtain the corresponding delay performances, which are similar. The results suggest that PHM has both the advantages of previous hierarchical matching algorithms (low hardware complexity) and iSLIP (low number of iterations). |
| doi_str_mv | 10.1109/TCOMM.2003.814201 |
| format | Article |
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Previous research has analyzed the hardware cost of those schedulers and their performance after a small number of iterations. In this paper, we formulate an upper bound for the number of iterations required by PHM to converge. Then, we compare the number of iterations required by iSLIP and PHM to achieve a maximal throughput under uniform Bernoulli traffic, by means of simulation. Finally, we obtain the corresponding delay performances, which are similar. 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(IEEE) 2003</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c353t-9a0620723e8a1182018718d2e2d4333669b05c12d8b7afd2fe2cdf2afbba3053</citedby><cites>FETCH-LOGICAL-c353t-9a0620723e8a1182018718d2e2d4333669b05c12d8b7afd2fe2cdf2afbba3053</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1214825$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1214825$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Asorey-Cacheda, R.</creatorcontrib><creatorcontrib>Gonzalez-Castano, F.J.</creatorcontrib><creatorcontrib>Lopez-Bravo, C.</creatorcontrib><creatorcontrib>Pousada-Carballo, J.M.</creatorcontrib><creatorcontrib>Rodriguez-Hernandez, P.S.</creatorcontrib><title>On the behavior of PHM distributed schedulers for input buffered packet switches</title><title>IEEE transactions on communications</title><addtitle>TCOMM</addtitle><description>iSLIP and parallel hierarchical matching (PHM) are distributed maximal size matching schedulers for input-buffered switches. Previous research has analyzed the hardware cost of those schedulers and their performance after a small number of iterations. In this paper, we formulate an upper bound for the number of iterations required by PHM to converge. Then, we compare the number of iterations required by iSLIP and PHM to achieve a maximal throughput under uniform Bernoulli traffic, by means of simulation. Finally, we obtain the corresponding delay performances, which are similar. The results suggest that PHM has both the advantages of previous hierarchical matching algorithms (low hardware complexity) and iSLIP (low number of iterations).</description><subject>Algorithms</subject><subject>Buffers</subject><subject>Computer simulation</subject><subject>Costs</subject><subject>Delay</subject><subject>Hardware</subject><subject>Impedance matching</subject><subject>Matching</subject><subject>Packet switching</subject><subject>Performance analysis</subject><subject>Prognostics and health management</subject><subject>Switches</subject><subject>Throughput</subject><subject>Traffic control</subject><subject>Upper bound</subject><subject>Upper bounds</subject><issn>0090-6778</issn><issn>1558-0857</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2003</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNp90UFLwzAUB_AgCs7pBxAvwYOeOl-StkmPMtQJG9th95C2L6yza2fSKn57s1UQPHh6h_z-IS9_Qq4ZTBiD7GE9XS4WEw4gJorFHNgJGbEkURGoRJ6SEUAGUSqlOicX3m8BIAYhRmS1bGi3QZrjxnxUraOtpavZgpaV71yV9x2W1BcbLPsanac2iKrZ9x3Ne2vRhdO9Kd6wo_6z6oLzl-TMmtrj1c8ck_Xz03o6i-bLl9fp4zwqRCK6KDOQcpBcoDKMqfBgJZkqOfIyFkKkaZZDUjBeqlwaW3KLvCgtNzbPjYBEjMn9cO3ete89-k7vKl9gXZsG297rDFgqlZIyyLt_JVdxqkRygLd_4LbtXROW0ErFInzqEbEBFa713qHVe1ftjPvSDPShCX1sQh-a0EMTIXMzZCpE_PWcxYon4htzw4O5</recordid><startdate>20030701</startdate><enddate>20030701</enddate><creator>Asorey-Cacheda, R.</creator><creator>Gonzalez-Castano, F.J.</creator><creator>Lopez-Bravo, C.</creator><creator>Pousada-Carballo, J.M.</creator><creator>Rodriguez-Hernandez, P.S.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20030701</creationdate><title>On the behavior of PHM distributed schedulers for input buffered packet switches</title><author>Asorey-Cacheda, R. ; Gonzalez-Castano, F.J. ; Lopez-Bravo, C. ; Pousada-Carballo, J.M. ; Rodriguez-Hernandez, P.S.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c353t-9a0620723e8a1182018718d2e2d4333669b05c12d8b7afd2fe2cdf2afbba3053</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2003</creationdate><topic>Algorithms</topic><topic>Buffers</topic><topic>Computer simulation</topic><topic>Costs</topic><topic>Delay</topic><topic>Hardware</topic><topic>Impedance matching</topic><topic>Matching</topic><topic>Packet switching</topic><topic>Performance analysis</topic><topic>Prognostics and health management</topic><topic>Switches</topic><topic>Throughput</topic><topic>Traffic control</topic><topic>Upper bound</topic><topic>Upper bounds</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Asorey-Cacheda, R.</creatorcontrib><creatorcontrib>Gonzalez-Castano, F.J.</creatorcontrib><creatorcontrib>Lopez-Bravo, C.</creatorcontrib><creatorcontrib>Pousada-Carballo, J.M.</creatorcontrib><creatorcontrib>Rodriguez-Hernandez, P.S.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on communications</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Asorey-Cacheda, R.</au><au>Gonzalez-Castano, F.J.</au><au>Lopez-Bravo, C.</au><au>Pousada-Carballo, J.M.</au><au>Rodriguez-Hernandez, P.S.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>On the behavior of PHM distributed schedulers for input buffered packet switches</atitle><jtitle>IEEE transactions on communications</jtitle><stitle>TCOMM</stitle><date>2003-07-01</date><risdate>2003</risdate><volume>51</volume><issue>7</issue><spage>1057</spage><epage>1060</epage><pages>1057-1060</pages><issn>0090-6778</issn><eissn>1558-0857</eissn><coden>IECMBT</coden><abstract>iSLIP and parallel hierarchical matching (PHM) are distributed maximal size matching schedulers for input-buffered switches. Previous research has analyzed the hardware cost of those schedulers and their performance after a small number of iterations. In this paper, we formulate an upper bound for the number of iterations required by PHM to converge. Then, we compare the number of iterations required by iSLIP and PHM to achieve a maximal throughput under uniform Bernoulli traffic, by means of simulation. Finally, we obtain the corresponding delay performances, which are similar. The results suggest that PHM has both the advantages of previous hierarchical matching algorithms (low hardware complexity) and iSLIP (low number of iterations).</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TCOMM.2003.814201</doi><tpages>4</tpages></addata></record> |
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| issn | 0090-6778 1558-0857 |
| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Algorithms Buffers Computer simulation Costs Delay Hardware Impedance matching Matching Packet switching Performance analysis Prognostics and health management Switches Throughput Traffic control Upper bound Upper bounds |
| title | On the behavior of PHM distributed schedulers for input buffered packet switches |
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