New multirate bandpass sigma-delta modulators

A new architecture for fourth- and sixth-order bandpass sigma-delta (BP-SD) modulators is proposed here. The basic BP-SD modulator is obtained from its low-pass (LP) counterpart by means of the standard transformation z/sup -1/ /spl rarr/ -z/sup -2/, which transforms the integrators in the LP modula...

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Veröffentlicht in:IEEE transactions on circuits and systems. 1, Fundamental theory and applications Fundamental theory and applications, 2004-11, Vol.51 (11), p.2141-2147
Hauptverfasser: Colodro, F., Torralba, A., Vega-Leal, A.P., Ridao, F.P.
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container_issue 11
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container_title IEEE transactions on circuits and systems. 1, Fundamental theory and applications
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creator Colodro, F.
Torralba, A.
Vega-Leal, A.P.
Ridao, F.P.
description A new architecture for fourth- and sixth-order bandpass sigma-delta (BP-SD) modulators is proposed here. The basic BP-SD modulator is obtained from its low-pass (LP) counterpart by means of the standard transformation z/sup -1/ /spl rarr/ -z/sup -2/, which transforms the integrators in the LP modulator into resonators in the BP modulator, and places the input signal band at the frequency f/sub s//4, where f/sub s/ is the sampling rate. In the proposed architecture, the second resonator (and the third one for the sixth-order case) is implemented using a two-path strategy, by means of two high-pass filters (whose poles are located at f/sub s//2) operating in a time-interleaved mode. However, unlike other BP-SD modulators using the two-path strategy, in our approach, the effective sampling frequency in the second resonator (and in the third one for the sixth-order case) is increased to 2/spl middot/f/sub s/ by maintaining the clock rate of the high-pass filters to f/sub s/ which, in turn, places their poles at f/sub s//2. The signal band in the input of the second resonator is moved from the center frequency f/sub s//4 to f/sub s//2 by a modulation process that separates the signal into their in-phase and quadrature components. Another demodulation process in the digital domain reverses this frequency translation of the signal band before the output signal is converted to the analog domain and fed back to the modulator input. A detailed theoretical analysis of the architecture is done in the paper. Owing to the multirate nature of the proposed modulators, simulation results show an improvement of approximately 12 dB in the input dynamic range (fourth-order case) when compared to conventional modulators of the same order clocked at the same frequency rate (in the first resonator).
doi_str_mv 10.1109/TCSI.2004.836854
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The basic BP-SD modulator is obtained from its low-pass (LP) counterpart by means of the standard transformation z/sup -1/ /spl rarr/ -z/sup -2/, which transforms the integrators in the LP modulator into resonators in the BP modulator, and places the input signal band at the frequency f/sub s//4, where f/sub s/ is the sampling rate. In the proposed architecture, the second resonator (and the third one for the sixth-order case) is implemented using a two-path strategy, by means of two high-pass filters (whose poles are located at f/sub s//2) operating in a time-interleaved mode. However, unlike other BP-SD modulators using the two-path strategy, in our approach, the effective sampling frequency in the second resonator (and in the third one for the sixth-order case) is increased to 2/spl middot/f/sub s/ by maintaining the clock rate of the high-pass filters to f/sub s/ which, in turn, places their poles at f/sub s//2. The signal band in the input of the second resonator is moved from the center frequency f/sub s//4 to f/sub s//2 by a modulation process that separates the signal into their in-phase and quadrature components. Another demodulation process in the digital domain reverses this frequency translation of the signal band before the output signal is converted to the analog domain and fed back to the modulator input. A detailed theoretical analysis of the architecture is done in the paper. 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The basic BP-SD modulator is obtained from its low-pass (LP) counterpart by means of the standard transformation z/sup -1/ /spl rarr/ -z/sup -2/, which transforms the integrators in the LP modulator into resonators in the BP modulator, and places the input signal band at the frequency f/sub s//4, where f/sub s/ is the sampling rate. In the proposed architecture, the second resonator (and the third one for the sixth-order case) is implemented using a two-path strategy, by means of two high-pass filters (whose poles are located at f/sub s//2) operating in a time-interleaved mode. However, unlike other BP-SD modulators using the two-path strategy, in our approach, the effective sampling frequency in the second resonator (and in the third one for the sixth-order case) is increased to 2/spl middot/f/sub s/ by maintaining the clock rate of the high-pass filters to f/sub s/ which, in turn, places their poles at f/sub s//2. The signal band in the input of the second resonator is moved from the center frequency f/sub s//4 to f/sub s//2 by a modulation process that separates the signal into their in-phase and quadrature components. Another demodulation process in the digital domain reverses this frequency translation of the signal band before the output signal is converted to the analog domain and fed back to the modulator input. A detailed theoretical analysis of the architecture is done in the paper. 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The basic BP-SD modulator is obtained from its low-pass (LP) counterpart by means of the standard transformation z/sup -1/ /spl rarr/ -z/sup -2/, which transforms the integrators in the LP modulator into resonators in the BP modulator, and places the input signal band at the frequency f/sub s//4, where f/sub s/ is the sampling rate. In the proposed architecture, the second resonator (and the third one for the sixth-order case) is implemented using a two-path strategy, by means of two high-pass filters (whose poles are located at f/sub s//2) operating in a time-interleaved mode. However, unlike other BP-SD modulators using the two-path strategy, in our approach, the effective sampling frequency in the second resonator (and in the third one for the sixth-order case) is increased to 2/spl middot/f/sub s/ by maintaining the clock rate of the high-pass filters to f/sub s/ which, in turn, places their poles at f/sub s//2. The signal band in the input of the second resonator is moved from the center frequency f/sub s//4 to f/sub s//2 by a modulation process that separates the signal into their in-phase and quadrature components. Another demodulation process in the digital domain reverses this frequency translation of the signal band before the output signal is converted to the analog domain and fed back to the modulator input. A detailed theoretical analysis of the architecture is done in the paper. Owing to the multirate nature of the proposed modulators, simulation results show an improvement of approximately 12 dB in the input dynamic range (fourth-order case) when compared to conventional modulators of the same order clocked at the same frequency rate (in the first resonator).</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TCSI.2004.836854</doi><tpages>7</tpages></addata></record>
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ispartof IEEE transactions on circuits and systems. 1, Fundamental theory and applications, 2004-11, Vol.51 (11), p.2141-2147
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1057-7122
1558-0806
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subjects Analog-digital conversion
Analog-to-digital conversion
Architecture
Bandpass
Circuits
Clocks
CMOS technology
Delta-sigma modulation
Demodulation
Frequency conversion
Modulators
multirate systems
Poles
Resonator filters
Resonators
Sampling
Sampling methods
sigma-delta (SD) modulation
Signal processing
Strategy
title New multirate bandpass sigma-delta modulators
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