Compensation of finite gain-bandwidth induced errors in continuous-time sigma-delta modulators
This paper introduces a possible compensation for finite gain-bandwidth (GBW) induced errors in continuous-time sigma-delta modulators. Therefore, a novel model is derived which reduces the effect of a finite GBW to a corresponding integrator gain-error and feedback loop delays. Thus, previously pub...
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| Veröffentlicht in: | IEEE transactions on circuits and systems. 1, Fundamental theory and applications Fundamental theory and applications, 2004-06, Vol.51 (6), p.1088-1099 |
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| container_title | IEEE transactions on circuits and systems. 1, Fundamental theory and applications |
| container_volume | 51 |
| creator | Ortmanns, M. Gerfers, F. Manoli, Y. |
| description | This paper introduces a possible compensation for finite gain-bandwidth (GBW) induced errors in continuous-time sigma-delta modulators. Therefore, a novel model is derived which reduces the effect of a finite GBW to a corresponding integrator gain-error and feedback loop delays. Thus, previously published methods for the compensation of these errors can be adopted with some modification. The results are confirmed analytically and by simulations and show a possible GBW reduction of about one order of magnitude compared to current designs. |
| doi_str_mv | 10.1109/TCSI.2004.829234 |
| format | Article |
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Therefore, a novel model is derived which reduces the effect of a finite GBW to a corresponding integrator gain-error and feedback loop delays. Thus, previously published methods for the compensation of these errors can be adopted with some modification. The results are confirmed analytically and by simulations and show a possible GBW reduction of about one order of magnitude compared to current designs.</description><identifier>ISSN: 1549-8328</identifier><identifier>ISSN: 1057-7122</identifier><identifier>EISSN: 1558-0806</identifier><identifier>DOI: 10.1109/TCSI.2004.829234</identifier><identifier>CODEN: ITCSCH</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Analytical models ; Bandwidth ; Circuits ; Compensation ; Delay ; Delay effects ; Design engineering ; Errors ; Feedback loop ; Feedback loops ; Filters ; Frequency ; Mathematical analysis ; Modulators ; Operational amplifiers ; Sampling methods ; Semiconductor device noise</subject><ispartof>IEEE transactions on circuits and systems. 1, Fundamental theory and applications, 2004-06, Vol.51 (6), p.1088-1099</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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The results are confirmed analytically and by simulations and show a possible GBW reduction of about one order of magnitude compared to current designs.</description><subject>Analytical models</subject><subject>Bandwidth</subject><subject>Circuits</subject><subject>Compensation</subject><subject>Delay</subject><subject>Delay effects</subject><subject>Design engineering</subject><subject>Errors</subject><subject>Feedback loop</subject><subject>Feedback loops</subject><subject>Filters</subject><subject>Frequency</subject><subject>Mathematical analysis</subject><subject>Modulators</subject><subject>Operational amplifiers</subject><subject>Sampling methods</subject><subject>Semiconductor device noise</subject><issn>1549-8328</issn><issn>1057-7122</issn><issn>1558-0806</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2004</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNp9kc2LFDEQxYMouM56F7w0HvTUs5XPSY4yrLqw4MH1asgk1WuW7mRM0iz735thBMGDp6qC3yve4xHyhsKWUjBXd_tvN1sGILaaGcbFM3JBpdQjaFDPT7swo-ZMvySvan0AYAY4vSA_9nk5YqquxZyGPA1TTLHhcO9iGg8uhccY2s8hprB6DAOWkkvt5-BzajGtea1jiwsONd4vbgw4NzcsOayza528JC8mN1d8_WduyPdP13f7L-Pt1883-4-3oxdCtVFKkEoBY0YYJXbi4IByh0wbzoLnh8OOec-08MGACCg5dcJoQylKJZ2Y-IZ8OP89lvxrxdrsEqvHeXYJu0VrgCrFJVWdfP9fkmkGWnLdwXf_gA95LamnsFpzYXa6e9wQOEO-5FoLTvZY4uLKk6VgT73YUy_21Is999Ilb8-SiIh_cQ49uuS_AUPJiL8</recordid><startdate>20040601</startdate><enddate>20040601</enddate><creator>Ortmanns, M.</creator><creator>Gerfers, F.</creator><creator>Manoli, Y.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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| ispartof | IEEE transactions on circuits and systems. 1, Fundamental theory and applications, 2004-06, Vol.51 (6), p.1088-1099 |
| issn | 1549-8328 1057-7122 1558-0806 |
| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Analytical models Bandwidth Circuits Compensation Delay Delay effects Design engineering Errors Feedback loop Feedback loops Filters Frequency Mathematical analysis Modulators Operational amplifiers Sampling methods Semiconductor device noise |
| title | Compensation of finite gain-bandwidth induced errors in continuous-time sigma-delta modulators |
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