Theoretical Study of Some Physical Aspects of Electronic Transport in nMOSFETs at the 10-nm Gate-Length
We discuss selected aspects of the physics of electronic transport in nMOSFETs at the 10-nm scale: Long-range Coulomb interactions, which may degrade performance and even prevent ballistic transport from occurring; scattering with high-k insulator interfacial modes, which depresses the electron mobi...
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| Veröffentlicht in: | IEEE transactions on electron devices 2007-09, Vol.54 (9), p.2116-2136 |
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| container_end_page | 2136 |
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| container_issue | 9 |
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| container_title | IEEE transactions on electron devices |
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| creator | Fischetti, M.V. O'Regan, T.P. Sudarshan Narayanan Sachs, C. Seonghoon Jin Jiseok Kim Yan Zhang |
| description | We discuss selected aspects of the physics of electronic transport in nMOSFETs at the 10-nm scale: Long-range Coulomb interactions, which may degrade performance and even prevent ballistic transport from occurring; scattering with high-k insulator interfacial modes, which depresses the electron mobility but is found to affect minimally the saturated transconductance of 15-nm devices; and the use of high-mobility small effective-mass substrates, which poses serious concerns related to performance limitations due to the density-of-states (DOS) bottleneck and to the band-to-band (Zener) leakage current. On the basis of our results, we argue that ballistic transport may not only be unachievable (because of unavoidable electron-electron collisions) but may also be undesirable, as it may enhance the DOS bottleneck. We also argue that the knowledge of low-field mobility is of little use in predicting quantitatively the performance of devices in the saturated region. |
| doi_str_mv | 10.1109/TED.2007.902722 |
| format | Article |
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On the basis of our results, we argue that ballistic transport may not only be unachievable (because of unavoidable electron-electron collisions) but may also be undesirable, as it may enhance the DOS bottleneck. We also argue that the knowledge of low-field mobility is of little use in predicting quantitatively the performance of devices in the saturated region.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2007.902722</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Collisions ; Devices ; Disk operating system (DOS) ; Electron mobility ; Electronics ; High- kappa gate dielectric ; Insulators ; Leakage current ; Logic gates ; low-field mobility ; Materials ; Monte Carlo ; MOSFETs ; Performance evaluation ; scaling ; Scattering ; short channel ; Silicon ; surface optical phonons ; transconductance ; Transport</subject><ispartof>IEEE transactions on electron devices, 2007-09, Vol.54 (9), p.2116-2136</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2007</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c449t-46cd3b72f2b1fbc79e7adaa12e2ea550943a7f05ea6d1522705e59aa26868b723</citedby><cites>FETCH-LOGICAL-c449t-46cd3b72f2b1fbc79e7adaa12e2ea550943a7f05ea6d1522705e59aa26868b723</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4294201$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4294201$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Fischetti, M.V.</creatorcontrib><creatorcontrib>O'Regan, T.P.</creatorcontrib><creatorcontrib>Sudarshan Narayanan</creatorcontrib><creatorcontrib>Sachs, C.</creatorcontrib><creatorcontrib>Seonghoon Jin</creatorcontrib><creatorcontrib>Jiseok Kim</creatorcontrib><creatorcontrib>Yan Zhang</creatorcontrib><title>Theoretical Study of Some Physical Aspects of Electronic Transport in nMOSFETs at the 10-nm Gate-Length</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>We discuss selected aspects of the physics of electronic transport in nMOSFETs at the 10-nm scale: Long-range Coulomb interactions, which may degrade performance and even prevent ballistic transport from occurring; scattering with high-k insulator interfacial modes, which depresses the electron mobility but is found to affect minimally the saturated transconductance of 15-nm devices; and the use of high-mobility small effective-mass substrates, which poses serious concerns related to performance limitations due to the density-of-states (DOS) bottleneck and to the band-to-band (Zener) leakage current. On the basis of our results, we argue that ballistic transport may not only be unachievable (because of unavoidable electron-electron collisions) but may also be undesirable, as it may enhance the DOS bottleneck. We also argue that the knowledge of low-field mobility is of little use in predicting quantitatively the performance of devices in the saturated region.</description><subject>Collisions</subject><subject>Devices</subject><subject>Disk operating system (DOS)</subject><subject>Electron mobility</subject><subject>Electronics</subject><subject>High- kappa gate dielectric</subject><subject>Insulators</subject><subject>Leakage current</subject><subject>Logic gates</subject><subject>low-field mobility</subject><subject>Materials</subject><subject>Monte Carlo</subject><subject>MOSFETs</subject><subject>Performance evaluation</subject><subject>scaling</subject><subject>Scattering</subject><subject>short channel</subject><subject>Silicon</subject><subject>surface optical phonons</subject><subject>transconductance</subject><subject>Transport</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2007</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNqFkT1vGzEMhoWiBeImmTNkETq00znU50ljkDhJAQcuYGcW5DPPvuB8ciV58L-vHBcZOqSTKPJ5SZAvIVcMxoyBvVlM7sccoB5b4DXnn8iIKVVXVkv9mYwAmKmsMOKMfE3ptXy1lHxE1osNhoi5a3xP53m_OtDQ0nnYIv21OaS39G3aYZPTsTDpSxTD0DV0Ef2QdiFm2g10eJ7NHyaLRH2meYOUQTVs6aPPWE1xWOfNBfnS-j7h5d_3nLwU_u6pms4ef97dTqtGSpsrqZuVWNa85UvWLpvaYu1X3jOOHL1SYKXwdQsKvV4xxXldQmW959poU3TinPw49d3F8HuPKbttlxrsez9g2CdnQWipyoX-SxoDWlnLoJDfPySFlEIJIQv47R_wNezjUPZ1RgsDAOY49-YENTGkFLF1u9htfTw4Bu7opCtOuqOT7uRkUVyfFB0ivtOSW8mBiT_Cs5dn</recordid><startdate>20070901</startdate><enddate>20070901</enddate><creator>Fischetti, M.V.</creator><creator>O'Regan, T.P.</creator><creator>Sudarshan Narayanan</creator><creator>Sachs, C.</creator><creator>Seonghoon Jin</creator><creator>Jiseok Kim</creator><creator>Yan Zhang</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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On the basis of our results, we argue that ballistic transport may not only be unachievable (because of unavoidable electron-electron collisions) but may also be undesirable, as it may enhance the DOS bottleneck. We also argue that the knowledge of low-field mobility is of little use in predicting quantitatively the performance of devices in the saturated region.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TED.2007.902722</doi><tpages>21</tpages></addata></record> |
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| subjects | Collisions Devices Disk operating system (DOS) Electron mobility Electronics High- kappa gate dielectric Insulators Leakage current Logic gates low-field mobility Materials Monte Carlo MOSFETs Performance evaluation scaling Scattering short channel Silicon surface optical phonons transconductance Transport |
| title | Theoretical Study of Some Physical Aspects of Electronic Transport in nMOSFETs at the 10-nm Gate-Length |
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