Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits
Power has become the primary design constraint for chip designers today. While Moore's law continues to provide additional transistors, power budgets have begun to prohibit those devices from actually being used. To reduce energy consumption, voltage scaling techniques have proved a popular tec...
Gespeichert in:
Veröffentlicht in: | Proceedings of the IEEE 2010-02, Vol.98 (2), p.253-266 |
---|---|
Hauptverfasser: | , , , , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | 266 |
---|---|
container_issue | 2 |
container_start_page | 253 |
container_title | Proceedings of the IEEE |
container_volume | 98 |
creator | Dreslinski, Ronald G. Wieckowski, Michael Blaauw, David Sylvester, Dennis Mudge, Trevor |
description | Power has become the primary design constraint for chip designers today. While Moore's law continues to provide additional transistors, power budgets have begun to prohibit those devices from actually being used. To reduce energy consumption, voltage scaling techniques have proved a popular technique with subthreshold design representing the endpoint of voltage scaling. Although it is extremely energy efficient, subthreshold design has been relegated to niche markets due to its major performance penalties. This paper defines and explores near-threshold computing (NTC), a design space where the supply voltage is approximately equal to the threshold voltage of the transistors. This region retains much of the energy savings of subthreshold operation with more favorable performance and variability characteristics. This makes it applicable to a broad range of power-constrained computing segments from sensors to high performance servers. This paper explores the barriers to the widespread adoption of NTC and describes current work aimed at overcoming these obstacles. |
doi_str_mv | 10.1109/JPROC.2009.2034764 |
format | Article |
fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_journals_856613634</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5395763</ieee_id><sourcerecordid>818832917</sourcerecordid><originalsourceid>FETCH-LOGICAL-c499t-aab6fe65c5e05f0737586ae21f333e06c8167c9b580320f6be670eb60376d023</originalsourceid><addsrcrecordid>eNqFkU9PGzEQxa2qSE2BL9BeVr3Qy8LYXs_a3Koo5Y_SglCu1coxs4nRZp3au0J8exyCOPRQLjNz-L03M3qMfeFwyjmYs-vbu5vpqQAwuciqxuoDm3CldCmEwo9sAsB1aQQ3n9jnlB4AQCqUE_bnN9lYLtaR0jp098U0bLbj4PvVeXFHrrN-k-fiVwiRTlIxt49FZsO4WheznuLqqZi1rXee-qG46gdaRTtQdvHRjX5IR-ygtV2i49d-yBY_Z4vpZTm_ubia_piXrjJmKK1dYkuonCJQLdSyVhotCd5KKQnQaY61M0ulQQpocUlYAy0RZI33IOQhO9nbbmP4O1Iamo1PjrrO9hTG1GiutRSG15n8_l8y7-GK66qC91HgBlW-tMrot3_QhzDGPn_caIXIJcodJPaQiyGlSG2zjX5j41N2anYhNi8hNrsQm9cQs-jrXuSJ6E2gpFE1SvkMof2Wnw</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>856613634</pqid></control><display><type>article</type><title>Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits</title><source>IEEE Xplore (Online service)</source><creator>Dreslinski, Ronald G. ; Wieckowski, Michael ; Blaauw, David ; Sylvester, Dennis ; Mudge, Trevor</creator><creatorcontrib>Dreslinski, Ronald G. ; Wieckowski, Michael ; Blaauw, David ; Sylvester, Dennis ; Mudge, Trevor</creatorcontrib><description>Power has become the primary design constraint for chip designers today. While Moore's law continues to provide additional transistors, power budgets have begun to prohibit those devices from actually being used. To reduce energy consumption, voltage scaling techniques have proved a popular technique with subthreshold design representing the endpoint of voltage scaling. Although it is extremely energy efficient, subthreshold design has been relegated to niche markets due to its major performance penalties. This paper defines and explores near-threshold computing (NTC), a design space where the supply voltage is approximately equal to the threshold voltage of the transistors. This region retains much of the energy savings of subthreshold operation with more favorable performance and variability characteristics. This makes it applicable to a broad range of power-constrained computing segments from sensors to high performance servers. This paper explores the barriers to the widespread adoption of NTC and describes current work aimed at overcoming these obstacles.</description><identifier>ISSN: 0018-9219</identifier><identifier>EISSN: 1558-2256</identifier><identifier>DOI: 10.1109/JPROC.2009.2034764</identifier><identifier>CODEN: IEEPAD</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Clocks ; CMOS integrated circuits ; CMOS technology ; Computation ; Computer architecture ; Design ; Design optimization ; Electric potential ; energy conservation ; Energy consumption ; Energy efficiency ; Fabrication ; High performance computing ; Integrated circuits ; Law ; Moore's Law ; Obstacles ; parallel processing ; Semiconductor devices ; Threshold voltage ; Transistors ; VLSI ; Voltage</subject><ispartof>Proceedings of the IEEE, 2010-02, Vol.98 (2), p.253-266</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Feb 2010</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c499t-aab6fe65c5e05f0737586ae21f333e06c8167c9b580320f6be670eb60376d023</citedby><cites>FETCH-LOGICAL-c499t-aab6fe65c5e05f0737586ae21f333e06c8167c9b580320f6be670eb60376d023</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5395763$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>315,781,785,797,27926,27927,54760</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5395763$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Dreslinski, Ronald G.</creatorcontrib><creatorcontrib>Wieckowski, Michael</creatorcontrib><creatorcontrib>Blaauw, David</creatorcontrib><creatorcontrib>Sylvester, Dennis</creatorcontrib><creatorcontrib>Mudge, Trevor</creatorcontrib><title>Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits</title><title>Proceedings of the IEEE</title><addtitle>JPROC</addtitle><description>Power has become the primary design constraint for chip designers today. While Moore's law continues to provide additional transistors, power budgets have begun to prohibit those devices from actually being used. To reduce energy consumption, voltage scaling techniques have proved a popular technique with subthreshold design representing the endpoint of voltage scaling. Although it is extremely energy efficient, subthreshold design has been relegated to niche markets due to its major performance penalties. This paper defines and explores near-threshold computing (NTC), a design space where the supply voltage is approximately equal to the threshold voltage of the transistors. This region retains much of the energy savings of subthreshold operation with more favorable performance and variability characteristics. This makes it applicable to a broad range of power-constrained computing segments from sensors to high performance servers. This paper explores the barriers to the widespread adoption of NTC and describes current work aimed at overcoming these obstacles.</description><subject>Clocks</subject><subject>CMOS integrated circuits</subject><subject>CMOS technology</subject><subject>Computation</subject><subject>Computer architecture</subject><subject>Design</subject><subject>Design optimization</subject><subject>Electric potential</subject><subject>energy conservation</subject><subject>Energy consumption</subject><subject>Energy efficiency</subject><subject>Fabrication</subject><subject>High performance computing</subject><subject>Integrated circuits</subject><subject>Law</subject><subject>Moore's Law</subject><subject>Obstacles</subject><subject>parallel processing</subject><subject>Semiconductor devices</subject><subject>Threshold voltage</subject><subject>Transistors</subject><subject>VLSI</subject><subject>Voltage</subject><issn>0018-9219</issn><issn>1558-2256</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2010</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNqFkU9PGzEQxa2qSE2BL9BeVr3Qy8LYXs_a3Koo5Y_SglCu1coxs4nRZp3au0J8exyCOPRQLjNz-L03M3qMfeFwyjmYs-vbu5vpqQAwuciqxuoDm3CldCmEwo9sAsB1aQQ3n9jnlB4AQCqUE_bnN9lYLtaR0jp098U0bLbj4PvVeXFHrrN-k-fiVwiRTlIxt49FZsO4WheznuLqqZi1rXee-qG46gdaRTtQdvHRjX5IR-ygtV2i49d-yBY_Z4vpZTm_ubia_piXrjJmKK1dYkuonCJQLdSyVhotCd5KKQnQaY61M0ulQQpocUlYAy0RZI33IOQhO9nbbmP4O1Iamo1PjrrO9hTG1GiutRSG15n8_l8y7-GK66qC91HgBlW-tMrot3_QhzDGPn_caIXIJcodJPaQiyGlSG2zjX5j41N2anYhNi8hNrsQm9cQs-jrXuSJ6E2gpFE1SvkMof2Wnw</recordid><startdate>20100201</startdate><enddate>20100201</enddate><creator>Dreslinski, Ronald G.</creator><creator>Wieckowski, Michael</creator><creator>Blaauw, David</creator><creator>Sylvester, Dennis</creator><creator>Mudge, Trevor</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope><scope>KR7</scope></search><sort><creationdate>20100201</creationdate><title>Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits</title><author>Dreslinski, Ronald G. ; Wieckowski, Michael ; Blaauw, David ; Sylvester, Dennis ; Mudge, Trevor</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c499t-aab6fe65c5e05f0737586ae21f333e06c8167c9b580320f6be670eb60376d023</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Clocks</topic><topic>CMOS integrated circuits</topic><topic>CMOS technology</topic><topic>Computation</topic><topic>Computer architecture</topic><topic>Design</topic><topic>Design optimization</topic><topic>Electric potential</topic><topic>energy conservation</topic><topic>Energy consumption</topic><topic>Energy efficiency</topic><topic>Fabrication</topic><topic>High performance computing</topic><topic>Integrated circuits</topic><topic>Law</topic><topic>Moore's Law</topic><topic>Obstacles</topic><topic>parallel processing</topic><topic>Semiconductor devices</topic><topic>Threshold voltage</topic><topic>Transistors</topic><topic>VLSI</topic><topic>Voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Dreslinski, Ronald G.</creatorcontrib><creatorcontrib>Wieckowski, Michael</creatorcontrib><creatorcontrib>Blaauw, David</creatorcontrib><creatorcontrib>Sylvester, Dennis</creatorcontrib><creatorcontrib>Mudge, Trevor</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005–Present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998–Present</collection><collection>IEEE Xplore (Online service)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><collection>Civil Engineering Abstracts</collection><jtitle>Proceedings of the IEEE</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Dreslinski, Ronald G.</au><au>Wieckowski, Michael</au><au>Blaauw, David</au><au>Sylvester, Dennis</au><au>Mudge, Trevor</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits</atitle><jtitle>Proceedings of the IEEE</jtitle><stitle>JPROC</stitle><date>2010-02-01</date><risdate>2010</risdate><volume>98</volume><issue>2</issue><spage>253</spage><epage>266</epage><pages>253-266</pages><issn>0018-9219</issn><eissn>1558-2256</eissn><coden>IEEPAD</coden><abstract>Power has become the primary design constraint for chip designers today. While Moore's law continues to provide additional transistors, power budgets have begun to prohibit those devices from actually being used. To reduce energy consumption, voltage scaling techniques have proved a popular technique with subthreshold design representing the endpoint of voltage scaling. Although it is extremely energy efficient, subthreshold design has been relegated to niche markets due to its major performance penalties. This paper defines and explores near-threshold computing (NTC), a design space where the supply voltage is approximately equal to the threshold voltage of the transistors. This region retains much of the energy savings of subthreshold operation with more favorable performance and variability characteristics. This makes it applicable to a broad range of power-constrained computing segments from sensors to high performance servers. This paper explores the barriers to the widespread adoption of NTC and describes current work aimed at overcoming these obstacles.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/JPROC.2009.2034764</doi><tpages>14</tpages></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISSN: 0018-9219 |
ispartof | Proceedings of the IEEE, 2010-02, Vol.98 (2), p.253-266 |
issn | 0018-9219 1558-2256 |
language | eng |
recordid | cdi_proquest_journals_856613634 |
source | IEEE Xplore (Online service) |
subjects | Clocks CMOS integrated circuits CMOS technology Computation Computer architecture Design Design optimization Electric potential energy conservation Energy consumption Energy efficiency Fabrication High performance computing Integrated circuits Law Moore's Law Obstacles parallel processing Semiconductor devices Threshold voltage Transistors VLSI Voltage |
title | Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-17T17%3A38%3A24IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Near-Threshold%20Computing:%20Reclaiming%20Moore's%20Law%20Through%20Energy%20Efficient%20Integrated%20Circuits&rft.jtitle=Proceedings%20of%20the%20IEEE&rft.au=Dreslinski,%20Ronald%20G.&rft.date=2010-02-01&rft.volume=98&rft.issue=2&rft.spage=253&rft.epage=266&rft.pages=253-266&rft.issn=0018-9219&rft.eissn=1558-2256&rft.coden=IEEPAD&rft_id=info:doi/10.1109/JPROC.2009.2034764&rft_dat=%3Cproquest_RIE%3E818832917%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=856613634&rft_id=info:pmid/&rft_ieee_id=5395763&rfr_iscdi=true |