A New Algorithm for Simultaneous Gate Sizing and Threshold Voltage Assignment

Gate sizing and threshold voltage (V t ) assignment are popular techniques for circuit timing and power optimization. Existing methods, by and large, are either sensitivity-driven heuristics or based on discretizing continuous optimization solutions. Sensitivity-driven heuristics are easily trapped...

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Veröffentlicht in:	IEEE transactions on computer-aided design of integrated circuits and systems 2010-02, Vol.29 (2), p.223-234
Hauptverfasser:	Liu, Yifang, Hu, Jiang
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms circuit optimization Circuits Combinatorial analysis Delay estimation Dynamic programming Gates (circuits) Heuristic Iterative algorithms Linear programming Mathematical models Optimization methods Power dissipation Sizing Table lookup Threshold voltage Time measurements Timing
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