Mixed-Signal Architectures for High-Efficiency and Low-Distortion Digital Audio Processing and Power Amplification
The paper addresses the algorithmic and architectural design of digital input power audio amplifiers. A modelling platform, based on a meet-in-the-middle approach between top-down and bottom-up design strategies, allows a fast but still accurate exploration of the mixed-signal design space. Differen...
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| Veröffentlicht in: | EURASIP journal on embedded systems 2010-01, Vol.2010 (1), p.1-11 |
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| container_title | EURASIP journal on embedded systems |
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| creator | Saponara, Sergio Terreni, Pierangelo |
| description | The paper addresses the algorithmic and architectural design of digital input power audio amplifiers. A modelling platform, based on a meet-in-the-middle approach between top-down and bottom-up design strategies, allows a fast but still accurate exploration of the mixed-signal design space. Different amplifier architectures are configured and compared to find optimal trade-offs among different cost-functions: low distortion, high efficiency, low circuit complexity and low sensitivity to parameter changes. A novel amplifier architecture is derived; its prototype implements digital processing IP macrocells (oversampler, interpolating filter, PWM cross-point deriver, noise shaper, multilevel PWM modulator, dead time compensator) on a single low-complexity FPGA while off-chip components are used only for the power output stage (LC filter and power MOS bridge); no heatsink is required. The resulting digital input amplifier features a power efficiency higher than 90% and a total harmonic distortion down to 0.13% at power levels of tens of Watts. Discussions towards the full-silicon integration of the mixed-signal amplifier in embedded devices, using BCD technology and targeting power levels of few Watts, are also reported. |
| doi_str_mv | 10.1155/2010/394070 |
| format | Article |
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A modelling platform, based on a meet-in-the-middle approach between top-down and bottom-up design strategies, allows a fast but still accurate exploration of the mixed-signal design space. Different amplifier architectures are configured and compared to find optimal trade-offs among different cost-functions: low distortion, high efficiency, low circuit complexity and low sensitivity to parameter changes. A novel amplifier architecture is derived; its prototype implements digital processing IP macrocells (oversampler, interpolating filter, PWM cross-point deriver, noise shaper, multilevel PWM modulator, dead time compensator) on a single low-complexity FPGA while off-chip components are used only for the power output stage (LC filter and power MOS bridge); no heatsink is required. The resulting digital input amplifier features a power efficiency higher than 90% and a total harmonic distortion down to 0.13% at power levels of tens of Watts. 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A modelling platform, based on a meet-in-the-middle approach between top-down and bottom-up design strategies, allows a fast but still accurate exploration of the mixed-signal design space. Different amplifier architectures are configured and compared to find optimal trade-offs among different cost-functions: low distortion, high efficiency, low circuit complexity and low sensitivity to parameter changes. A novel amplifier architecture is derived; its prototype implements digital processing IP macrocells (oversampler, interpolating filter, PWM cross-point deriver, noise shaper, multilevel PWM modulator, dead time compensator) on a single low-complexity FPGA while off-chip components are used only for the power output stage (LC filter and power MOS bridge); no heatsink is required. The resulting digital input amplifier features a power efficiency higher than 90% and a total harmonic distortion down to 0.13% at power levels of tens of Watts. Discussions towards the full-silicon integration of the mixed-signal amplifier in embedded devices, using BCD technology and targeting power levels of few Watts, are also reported.</description><subject>Algorithms</subject><subject>Architecture</subject><subject>Circuits and Systems</subject><subject>Control Structures and Microprogramming</subject><subject>Design Methodologies and Innovative Architectures for Mixed-Signal Embedded Systems</subject><subject>Digital signal processors</subject><subject>Efficiency</subject><subject>Electronic Circuits and Devices</subject><subject>Engineering</subject><subject>Receivers & amplifiers</subject><subject>Research Article</subject><subject>Signal,Image and Speech Processing</subject><subject>Space exploration</subject><issn>1687-3955</issn><issn>1687-3963</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2010</creationdate><recordtype>article</recordtype><sourceid>C6C</sourceid><sourceid>BENPR</sourceid><recordid>eNptkEFPwyAYhonRxDk9-QeIV62DUig9Ltt0JjMuUc9NS6Fj2UoFmrl_L7VGL56-7_C8b_K8AFxjdI8xpZMYYTQhWYJSdAJGmPE0Ihkjp78_pefgwrktQgnjhI-Afdafsopedd0UOzi1YqO9FL6z0kFlLFzqehMtlNJCy0YcYdFUcGUO0Vw7b6zXpoFzXWvfh7tKG7i2RkjndFN_s2tzkBZO9-1Oh46iD1yCM1XsnLz6uWPw_rB4my2j1cvj02y6ikRMuY8oxyXFnAseZ7LMJBG4IiljwQ0lWGScEVUyqnBCVFJUJWeIlAgFz6osCcFkDG6G3taaj046n29NZ4OmyzmlaRzHGQ3Q7QAJa5yzUuWt1fvCHnOM8n7TvN80HzYN9N1Au0A1tbR_lf_hXykGdpY</recordid><startdate>20100101</startdate><enddate>20100101</enddate><creator>Saponara, Sergio</creator><creator>Terreni, Pierangelo</creator><general>Springer International Publishing</general><general>Springer Nature B.V</general><scope>C6C</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>3V.</scope><scope>7SC</scope><scope>7XB</scope><scope>8AL</scope><scope>8FD</scope><scope>8FE</scope><scope>8FG</scope><scope>8FK</scope><scope>ABUWG</scope><scope>AFKRA</scope><scope>ARAPS</scope><scope>AZQEC</scope><scope>BENPR</scope><scope>BGLVJ</scope><scope>CCPQU</scope><scope>DWQXO</scope><scope>GNUQQ</scope><scope>HCIFZ</scope><scope>JQ2</scope><scope>K7-</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>M0N</scope><scope>P5Z</scope><scope>P62</scope><scope>PIMPY</scope><scope>PQEST</scope><scope>PQQKQ</scope><scope>PQUKI</scope><scope>Q9U</scope></search><sort><creationdate>20100101</creationdate><title>Mixed-Signal Architectures for High-Efficiency and Low-Distortion Digital Audio Processing and Power Amplification</title><author>Saponara, Sergio ; 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A modelling platform, based on a meet-in-the-middle approach between top-down and bottom-up design strategies, allows a fast but still accurate exploration of the mixed-signal design space. Different amplifier architectures are configured and compared to find optimal trade-offs among different cost-functions: low distortion, high efficiency, low circuit complexity and low sensitivity to parameter changes. A novel amplifier architecture is derived; its prototype implements digital processing IP macrocells (oversampler, interpolating filter, PWM cross-point deriver, noise shaper, multilevel PWM modulator, dead time compensator) on a single low-complexity FPGA while off-chip components are used only for the power output stage (LC filter and power MOS bridge); no heatsink is required. The resulting digital input amplifier features a power efficiency higher than 90% and a total harmonic distortion down to 0.13% at power levels of tens of Watts. Discussions towards the full-silicon integration of the mixed-signal amplifier in embedded devices, using BCD technology and targeting power levels of few Watts, are also reported.</abstract><cop>Cham</cop><pub>Springer International Publishing</pub><doi>10.1155/2010/394070</doi><tpages>11</tpages><oa>free_for_read</oa></addata></record> |
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| subjects | Algorithms Architecture Circuits and Systems Control Structures and Microprogramming Design Methodologies and Innovative Architectures for Mixed-Signal Embedded Systems Digital signal processors Efficiency Electronic Circuits and Devices Engineering Receivers & amplifiers Research Article Signal,Image and Speech Processing Space exploration |
| title | Mixed-Signal Architectures for High-Efficiency and Low-Distortion Digital Audio Processing and Power Amplification |
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