Low-Temperature Deuterium Annealing for HfO₂/SiO₂ Gate Dielectric in Silicon MOSFETs
In this study, low-temperature deuterium annealing (LTDA) at 300 °C is proposed to enhance both the performance and reliability of silicon-based high-k metal gate (HKMG) MOSFETs. A comparative study with hydrogen (H2) annealing under identical conditions is conducted to evaluate the specific impact...
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Veröffentlicht in: | IEEE journal of the Electron Devices Society 2024, Vol.12, p.1030-1033 |
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creator | Kil, Tae-Hyun Yeon, Ju-Won Park, Hyo-Jun Lee, Moon-Kwon Yun, Eui-Cheol Kim, Min-Woo Kang, Sang-Min Park, Jun-Young |
description | In this study, low-temperature deuterium annealing (LTDA) at 300 °C is proposed to enhance both the performance and reliability of silicon-based high-k metal gate (HKMG) MOSFETs. A comparative study with hydrogen (H2) annealing under identical conditions is conducted to evaluate the specific impact of deuterium (D2). Comprehensive DC characterizations and evaluations of stress immunity under hot-carrier injection (HCI) and positive bias stress (PBS) conditions, are performed. The results confirm that even at a low temperature of 300 °C, D2 has a more substantial effect on device performance and reliability compared to H2. This study provides a guideline for reducing the annealing temperature in the fabrication of HKMG MOSFETs. |
doi_str_mv | 10.1109/JEDS.2024.3502738 |
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A comparative study with hydrogen (H2) annealing under identical conditions is conducted to evaluate the specific impact of deuterium (D2). Comprehensive DC characterizations and evaluations of stress immunity under hot-carrier injection (HCI) and positive bias stress (PBS) conditions, are performed. The results confirm that even at a low temperature of 300 °C, D2 has a more substantial effect on device performance and reliability compared to H2. This study provides a guideline for reducing the annealing temperature in the fabrication of HKMG MOSFETs.</description><identifier>ISSN: 2168-6734</identifier><identifier>EISSN: 2168-6734</identifier><identifier>DOI: 10.1109/JEDS.2024.3502738</identifier><identifier>CODEN: IJEDAC</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Annealing ; Carrier injection ; Comparative studies ; Deuterium ; Dielectrics ; Hafnium oxide ; high-k dielectric ; hot-carrier injection (HCI) ; Logic gates ; Low temperature ; low-temperature deuterium annealing (LTDA) ; MOSFET ; MOSFETs ; Performance evaluation ; positive bias stress (PBS) ; Reliability ; Silicon ; Stress</subject><ispartof>IEEE journal of the Electron Devices Society, 2024, Vol.12, p.1030-1033</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2024</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c242t-8b9ce90d3d13f5dcc118ffdd85e23fb793787e10492753d7d1d43497708d9cff3</cites><orcidid>0000-0003-4830-9739</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/10758816$$EHTML$$P50$$Gieee$$Hfree_for_read</linktohtml><link.rule.ids>314,776,780,860,2096,4010,27610,27900,27901,27902,54908</link.rule.ids></links><search><creatorcontrib>Kil, Tae-Hyun</creatorcontrib><creatorcontrib>Yeon, Ju-Won</creatorcontrib><creatorcontrib>Park, Hyo-Jun</creatorcontrib><creatorcontrib>Lee, Moon-Kwon</creatorcontrib><creatorcontrib>Yun, Eui-Cheol</creatorcontrib><creatorcontrib>Kim, Min-Woo</creatorcontrib><creatorcontrib>Kang, Sang-Min</creatorcontrib><creatorcontrib>Park, Jun-Young</creatorcontrib><title>Low-Temperature Deuterium Annealing for HfO₂/SiO₂ Gate Dielectric in Silicon MOSFETs</title><title>IEEE journal of the Electron Devices Society</title><addtitle>JEDS</addtitle><description>In this study, low-temperature deuterium annealing (LTDA) at 300 °C is proposed to enhance both the performance and reliability of silicon-based high-k metal gate (HKMG) MOSFETs. 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This study provides a guideline for reducing the annealing temperature in the fabrication of HKMG MOSFETs.</description><subject>Annealing</subject><subject>Carrier injection</subject><subject>Comparative studies</subject><subject>Deuterium</subject><subject>Dielectrics</subject><subject>Hafnium oxide</subject><subject>high-k dielectric</subject><subject>hot-carrier injection (HCI)</subject><subject>Logic gates</subject><subject>Low temperature</subject><subject>low-temperature deuterium annealing (LTDA)</subject><subject>MOSFET</subject><subject>MOSFETs</subject><subject>Performance evaluation</subject><subject>positive bias stress (PBS)</subject><subject>Reliability</subject><subject>Silicon</subject><subject>Stress</subject><issn>2168-6734</issn><issn>2168-6734</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2024</creationdate><recordtype>article</recordtype><sourceid>ESBDL</sourceid><sourceid>RIE</sourceid><sourceid>DOA</sourceid><recordid>eNpNkc9KAzEQxhdRUKoPIHhY8Lw1_3aTHIutbaXSQxW8hTSZlJTtpmZ3Ea8-qk9iakWcyzcM33wz8Muya4yGGCN59zgZr4YEETakJSKcipPsguBKFBWn7PRff55dte0WpRK4klV1kb0uwnvxDLs9RN31EfIx9B1E3-_yUdOArn2zyV2I-cwtvz4_71b-IPlUd8nqoQbTRW9y3-QrX3sTmvxpuXqYPLeX2ZnTdQtXvzrIXtL4flYsltP5_WhRGMJIV4i1NCCRpRZTV1pjMBbOWStKINStuaRccMCIScJLarnFllEmOUfCSuMcHWTzY64Neqv20e90_FBBe_UzCHGjdOy8qUFByVjpkAaT8jTWwlLDqzXDhKCKiXXKuj1m7WN466Ht1Db0sUnvK4opw7QUUiYXPrpMDG0bwf1dxUgdeKgDD3XgoX55pJ2b444HgH9-XopEgn4DMIiF-g</recordid><startdate>2024</startdate><enddate>2024</enddate><creator>Kil, Tae-Hyun</creator><creator>Yeon, Ju-Won</creator><creator>Park, Hyo-Jun</creator><creator>Lee, Moon-Kwon</creator><creator>Yun, Eui-Cheol</creator><creator>Kim, Min-Woo</creator><creator>Kang, Sang-Min</creator><creator>Park, Jun-Young</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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A comparative study with hydrogen (H2) annealing under identical conditions is conducted to evaluate the specific impact of deuterium (D2). Comprehensive DC characterizations and evaluations of stress immunity under hot-carrier injection (HCI) and positive bias stress (PBS) conditions, are performed. The results confirm that even at a low temperature of 300 °C, D2 has a more substantial effect on device performance and reliability compared to H2. This study provides a guideline for reducing the annealing temperature in the fabrication of HKMG MOSFETs.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/JEDS.2024.3502738</doi><tpages>4</tpages><orcidid>https://orcid.org/0000-0003-4830-9739</orcidid><oa>free_for_read</oa></addata></record> |
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subjects | Annealing Carrier injection Comparative studies Deuterium Dielectrics Hafnium oxide high-k dielectric hot-carrier injection (HCI) Logic gates Low temperature low-temperature deuterium annealing (LTDA) MOSFET MOSFETs Performance evaluation positive bias stress (PBS) Reliability Silicon Stress |
title | Low-Temperature Deuterium Annealing for HfO₂/SiO₂ Gate Dielectric in Silicon MOSFETs |
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