Characteristics of Vertical Transistors on a GaN Substrate Fabricated via Na‐Flux Method and Enlargement of the Substrate Surpassing 6 Inches
The Na‐flux method is expected to be a key GaN growth technique for obtaining ideal bulk GaN crystals. Herein, the structural quality of the latest GaN crystals grown using the Na‐flux method and, for the first time, the characteristics of a vertical transistor fabricated on a GaN substrate grown us...
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creator | Imanishi, Masayuki Usami, Shigeyoshi Murakami, Kosuke Okumura, Kanako Nakamura, Kosuke Kakinouchi, Keisuke Otoki, Yohei Yamashita, Tomio Tsurumi, Naohiro Tamura, Satoshi Ohno, Hiroshi Okayama, Yoshio Fujimori, Taku Nagai, Seiji Moriyama, Miki Mori, Yusuke |
description | The Na‐flux method is expected to be a key GaN growth technique for obtaining ideal bulk GaN crystals. Herein, the structural quality of the latest GaN crystals grown using the Na‐flux method and, for the first time, the characteristics of a vertical transistor fabricated on a GaN substrate grown using this method are discussed. Vertical transistors exhibit normally off operation with a gate voltage threshold exceeding 2 V and a maximum drain current of 3.3 A during the on‐state operation. Additionally, it demonstrates a breakdown voltage exceeding 600 V and a low leakage current during off‐state operation. It is also described that the variation in the on‐resistance can be minimized using GaN substrates with minimal off‐angle variations. This is crucial for achieving the large‐current chips required for future demonstration of actual devices. In addition, the reverse I–V characteristics of the parasitic p–n junction diode (PND) structures indicate a reduction in the number of devices with a significant leakage current compared to commercially available GaN substrates. Finally, a circular GaN substrate with a diameter of 161 mm, surpassing 6 inches, grown using the Na‐flux method is demonstrated, making it the largest GaN substrate aside from those produced through the tiling technique.
In this article, authors describe characteristics of vertical GaN transistors fabricated on the 2 inch hydride vapor phase epitaxy (HVPE) GaN substrate which is based on the GaN wafer grown by the Na‐flux method. Besides, GaN substrate with 161 mm diameter grown by the Na‐flux method is introduced, which is the world's largest class GaN substrate. |
doi_str_mv | 10.1002/pssr.202400106 |
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In this article, authors describe characteristics of vertical GaN transistors fabricated on the 2 inch hydride vapor phase epitaxy (HVPE) GaN substrate which is based on the GaN wafer grown by the Na‐flux method. Besides, GaN substrate with 161 mm diameter grown by the Na‐flux method is introduced, which is the world's largest class GaN substrate.</description><identifier>ISSN: 1862-6254</identifier><identifier>EISSN: 1862-6270</identifier><identifier>DOI: 10.1002/pssr.202400106</identifier><language>eng</language><publisher>Weinheim: Wiley Subscription Services, Inc</publisher><subject>6 inch ; Crystal growth ; Crystal structure ; Current voltage characteristics ; Gallium nitrides ; GaN ; hydride vapor phase epitaxy ; Junction diodes ; Leakage current ; Na flux ; on‐resistance ; P-n junctions ; p–n junction diode ; Tiling ; Transistors ; vertical transistor</subject><ispartof>Physica status solidi. PSS-RRL. Rapid research letters, 2024-11, Vol.18 (11), p.n/a</ispartof><rights>2024 The Author(s). physica status solidi (RRL) Rapid Research Letters published by Wiley‐VCH GmbH</rights><rights>2024. This article is published under http://creativecommons.org/licenses/by/4.0/ (the “License”). Notwithstanding the ProQuest Terms and Conditions, you may use this content in accordance with the terms of the License.</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c2866-c08633a5efbd1bafb200c0c0253e7bd2df11aaabfb24dafee7a6919b1410711c3</cites><orcidid>0000-0003-2952-7458 ; 0000-0002-9710-1718 ; 0000-0001-9395-1750</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://onlinelibrary.wiley.com/doi/pdf/10.1002%2Fpssr.202400106$$EPDF$$P50$$Gwiley$$Hfree_for_read</linktopdf><linktohtml>$$Uhttps://onlinelibrary.wiley.com/doi/full/10.1002%2Fpssr.202400106$$EHTML$$P50$$Gwiley$$Hfree_for_read</linktohtml><link.rule.ids>314,780,784,1417,27924,27925,45574,45575</link.rule.ids></links><search><creatorcontrib>Imanishi, Masayuki</creatorcontrib><creatorcontrib>Usami, Shigeyoshi</creatorcontrib><creatorcontrib>Murakami, Kosuke</creatorcontrib><creatorcontrib>Okumura, Kanako</creatorcontrib><creatorcontrib>Nakamura, Kosuke</creatorcontrib><creatorcontrib>Kakinouchi, Keisuke</creatorcontrib><creatorcontrib>Otoki, Yohei</creatorcontrib><creatorcontrib>Yamashita, Tomio</creatorcontrib><creatorcontrib>Tsurumi, Naohiro</creatorcontrib><creatorcontrib>Tamura, Satoshi</creatorcontrib><creatorcontrib>Ohno, Hiroshi</creatorcontrib><creatorcontrib>Okayama, Yoshio</creatorcontrib><creatorcontrib>Fujimori, Taku</creatorcontrib><creatorcontrib>Nagai, Seiji</creatorcontrib><creatorcontrib>Moriyama, Miki</creatorcontrib><creatorcontrib>Mori, Yusuke</creatorcontrib><title>Characteristics of Vertical Transistors on a GaN Substrate Fabricated via Na‐Flux Method and Enlargement of the Substrate Surpassing 6 Inches</title><title>Physica status solidi. PSS-RRL. Rapid research letters</title><description>The Na‐flux method is expected to be a key GaN growth technique for obtaining ideal bulk GaN crystals. Herein, the structural quality of the latest GaN crystals grown using the Na‐flux method and, for the first time, the characteristics of a vertical transistor fabricated on a GaN substrate grown using this method are discussed. Vertical transistors exhibit normally off operation with a gate voltage threshold exceeding 2 V and a maximum drain current of 3.3 A during the on‐state operation. Additionally, it demonstrates a breakdown voltage exceeding 600 V and a low leakage current during off‐state operation. It is also described that the variation in the on‐resistance can be minimized using GaN substrates with minimal off‐angle variations. This is crucial for achieving the large‐current chips required for future demonstration of actual devices. In addition, the reverse I–V characteristics of the parasitic p–n junction diode (PND) structures indicate a reduction in the number of devices with a significant leakage current compared to commercially available GaN substrates. Finally, a circular GaN substrate with a diameter of 161 mm, surpassing 6 inches, grown using the Na‐flux method is demonstrated, making it the largest GaN substrate aside from those produced through the tiling technique.
In this article, authors describe characteristics of vertical GaN transistors fabricated on the 2 inch hydride vapor phase epitaxy (HVPE) GaN substrate which is based on the GaN wafer grown by the Na‐flux method. Besides, GaN substrate with 161 mm diameter grown by the Na‐flux method is introduced, which is the world's largest class GaN substrate.</description><subject>6 inch</subject><subject>Crystal growth</subject><subject>Crystal structure</subject><subject>Current voltage characteristics</subject><subject>Gallium nitrides</subject><subject>GaN</subject><subject>hydride vapor phase epitaxy</subject><subject>Junction diodes</subject><subject>Leakage current</subject><subject>Na flux</subject><subject>on‐resistance</subject><subject>P-n junctions</subject><subject>p–n junction diode</subject><subject>Tiling</subject><subject>Transistors</subject><subject>vertical transistor</subject><issn>1862-6254</issn><issn>1862-6270</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2024</creationdate><recordtype>article</recordtype><sourceid>24P</sourceid><sourceid>WIN</sourceid><recordid>eNqFkM9Kw0AQxoMoWKtXzwueU3c3_5qjlFYLtYqpXsPsZtKkpEnc3ai9-Qb6jD6JWyrVm8xhhpnv-wZ-jnPO6IBRyi9brdWAU-5Tymh44PTYMORuyCN6uJ8D_9g50XpFaRBHvtdzPkYFKJAGValNKTVpcvKEyo5QkYWCWtt9o-y-JkCuYU6STmijwCCZgFBWZzAjLyWQOXy9f06q7o3coimajECdkXFdgVriGmuzjTYF_glIOtWC1mW9JCGZ1rJAfeoc5VBpPPvpfedxMl6MbtzZ3fV0dDVzJR-GoSvpMPQ8CDAXGROQC06ptMUDDyOR8SxnDACEPfgZ5IgRhDGLBfMZjRiTXt-52OW2qnnuUJt01XSqti9Tj3ELh0ZebFWDnUqqxtLFPG1VuQa1SRlNt9DTLfR0D90a4p3htaxw8486vU-Sh1_vN_aaiec</recordid><startdate>202411</startdate><enddate>202411</enddate><creator>Imanishi, Masayuki</creator><creator>Usami, Shigeyoshi</creator><creator>Murakami, Kosuke</creator><creator>Okumura, Kanako</creator><creator>Nakamura, Kosuke</creator><creator>Kakinouchi, Keisuke</creator><creator>Otoki, Yohei</creator><creator>Yamashita, Tomio</creator><creator>Tsurumi, Naohiro</creator><creator>Tamura, Satoshi</creator><creator>Ohno, Hiroshi</creator><creator>Okayama, Yoshio</creator><creator>Fujimori, Taku</creator><creator>Nagai, Seiji</creator><creator>Moriyama, Miki</creator><creator>Mori, Yusuke</creator><general>Wiley Subscription Services, Inc</general><scope>24P</scope><scope>WIN</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7U5</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0003-2952-7458</orcidid><orcidid>https://orcid.org/0000-0002-9710-1718</orcidid><orcidid>https://orcid.org/0000-0001-9395-1750</orcidid></search><sort><creationdate>202411</creationdate><title>Characteristics of Vertical Transistors on a GaN Substrate Fabricated via Na‐Flux Method and Enlargement of the Substrate Surpassing 6 Inches</title><author>Imanishi, Masayuki ; Usami, Shigeyoshi ; Murakami, Kosuke ; Okumura, Kanako ; Nakamura, Kosuke ; Kakinouchi, Keisuke ; Otoki, Yohei ; Yamashita, Tomio ; Tsurumi, Naohiro ; Tamura, Satoshi ; Ohno, Hiroshi ; Okayama, Yoshio ; Fujimori, Taku ; Nagai, Seiji ; Moriyama, Miki ; Mori, Yusuke</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c2866-c08633a5efbd1bafb200c0c0253e7bd2df11aaabfb24dafee7a6919b1410711c3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2024</creationdate><topic>6 inch</topic><topic>Crystal growth</topic><topic>Crystal structure</topic><topic>Current voltage characteristics</topic><topic>Gallium nitrides</topic><topic>GaN</topic><topic>hydride vapor phase epitaxy</topic><topic>Junction diodes</topic><topic>Leakage current</topic><topic>Na flux</topic><topic>on‐resistance</topic><topic>P-n junctions</topic><topic>p–n junction diode</topic><topic>Tiling</topic><topic>Transistors</topic><topic>vertical transistor</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Imanishi, Masayuki</creatorcontrib><creatorcontrib>Usami, Shigeyoshi</creatorcontrib><creatorcontrib>Murakami, Kosuke</creatorcontrib><creatorcontrib>Okumura, Kanako</creatorcontrib><creatorcontrib>Nakamura, Kosuke</creatorcontrib><creatorcontrib>Kakinouchi, Keisuke</creatorcontrib><creatorcontrib>Otoki, Yohei</creatorcontrib><creatorcontrib>Yamashita, Tomio</creatorcontrib><creatorcontrib>Tsurumi, Naohiro</creatorcontrib><creatorcontrib>Tamura, Satoshi</creatorcontrib><creatorcontrib>Ohno, Hiroshi</creatorcontrib><creatorcontrib>Okayama, Yoshio</creatorcontrib><creatorcontrib>Fujimori, Taku</creatorcontrib><creatorcontrib>Nagai, Seiji</creatorcontrib><creatorcontrib>Moriyama, Miki</creatorcontrib><creatorcontrib>Mori, Yusuke</creatorcontrib><collection>Wiley Online Library (Open Access Collection)</collection><collection>Wiley Online Library (Open Access Collection)</collection><collection>CrossRef</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Physica status solidi. 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Rapid research letters</jtitle><date>2024-11</date><risdate>2024</risdate><volume>18</volume><issue>11</issue><epage>n/a</epage><issn>1862-6254</issn><eissn>1862-6270</eissn><abstract>The Na‐flux method is expected to be a key GaN growth technique for obtaining ideal bulk GaN crystals. Herein, the structural quality of the latest GaN crystals grown using the Na‐flux method and, for the first time, the characteristics of a vertical transistor fabricated on a GaN substrate grown using this method are discussed. Vertical transistors exhibit normally off operation with a gate voltage threshold exceeding 2 V and a maximum drain current of 3.3 A during the on‐state operation. Additionally, it demonstrates a breakdown voltage exceeding 600 V and a low leakage current during off‐state operation. It is also described that the variation in the on‐resistance can be minimized using GaN substrates with minimal off‐angle variations. This is crucial for achieving the large‐current chips required for future demonstration of actual devices. In addition, the reverse I–V characteristics of the parasitic p–n junction diode (PND) structures indicate a reduction in the number of devices with a significant leakage current compared to commercially available GaN substrates. Finally, a circular GaN substrate with a diameter of 161 mm, surpassing 6 inches, grown using the Na‐flux method is demonstrated, making it the largest GaN substrate aside from those produced through the tiling technique.
In this article, authors describe characteristics of vertical GaN transistors fabricated on the 2 inch hydride vapor phase epitaxy (HVPE) GaN substrate which is based on the GaN wafer grown by the Na‐flux method. Besides, GaN substrate with 161 mm diameter grown by the Na‐flux method is introduced, which is the world's largest class GaN substrate.</abstract><cop>Weinheim</cop><pub>Wiley Subscription Services, Inc</pub><doi>10.1002/pssr.202400106</doi><tpages>10</tpages><orcidid>https://orcid.org/0000-0003-2952-7458</orcidid><orcidid>https://orcid.org/0000-0002-9710-1718</orcidid><orcidid>https://orcid.org/0000-0001-9395-1750</orcidid><oa>free_for_read</oa></addata></record> |
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subjects | 6 inch Crystal growth Crystal structure Current voltage characteristics Gallium nitrides GaN hydride vapor phase epitaxy Junction diodes Leakage current Na flux on‐resistance P-n junctions p–n junction diode Tiling Transistors vertical transistor |
title | Characteristics of Vertical Transistors on a GaN Substrate Fabricated via Na‐Flux Method and Enlargement of the Substrate Surpassing 6 Inches |
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