Material Choices for Tunnel Dielectric Layer and Gate Blocking Layer for Ferroelectric NAND Applications

We present an experimental study to compare the impacts of different dielectric materials - Al 2 O 3 and SiO 2 used as the tunnel dielectric layer (TDL) and the gate blocking layer (GBL) on the performance of ferroelectric gate stacks for NAND storage applications. We considered the maximum memory w...

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Veröffentlicht in:	IEEE electron device letters 2024-10, Vol.45 (10), p.1776-1779
Hauptverfasser:	Fernandes, Lance, Venkatesan Ravindran, Prasanna, Song, Taeyoung, Das, Dipjyoti, Park, Chinsung, Afroze, Nashrah, Tian, Mengkun, Chen, Hang, Chern, Winston, Kim, Kijoon, Woo, Jongho, Lim, Suhwan, Kim, Kwangsoo, Kim, Wanki, Ha, Daewon, Yu, Shimeng, Datta, Suman, Khan, Asif
Format:	Artikel
Sprache:	eng
Schlagworte:	Aluminum oxide Dielectric materials Dielectrics FeFETs Ferroelectric Ferroelectric materials Ferroelectricity Iron ISPP Knobs Logic gates memory window Performance evaluation Performance measurement Silicon dioxide Threshold voltage vertical NAND
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