Soft-Error Tolerance by Guard-Gate Structures on Flip-Flops in 22 and 65 nm FD-SOI Technologies
We evaluated soft-error tolerance by heavy-ion irradiation test on three-types of flip-flops (FFs) named the standard FF (STDFF), the dual feedback recovery FF (DFRFF), and the DFRFF with long delay (DFRFFLD) in 22 and 65 nm fully-depleted silicon on insulator (FD-SOI) technologies. The guard-gate (...
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| Veröffentlicht in: | IEICE Transactions on Electronics 2024/07/01, Vol.E107.C(7), pp.191-200 |
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| creator | NAKAJIMA, Ryuichi ITO, Takafumi SUGITANI, Shotaro KII, Tomoya EBARA, Mitsunori FURUTA, Jun KOBAYASHI, Kazutoshi LOUVAT, Mathieu JACQUET, Francois ELOY, Jean-Christophe MONTFORT, Olivier JURE, Lionel HUARD, Vincent |
| description | We evaluated soft-error tolerance by heavy-ion irradiation test on three-types of flip-flops (FFs) named the standard FF (STDFF), the dual feedback recovery FF (DFRFF), and the DFRFF with long delay (DFRFFLD) in 22 and 65 nm fully-depleted silicon on insulator (FD-SOI) technologies. The guard-gate (GG) structure in DFRFF mitigates soft errors. A single event transient (SET) pulse is removed by the C-element with the signal delayed by the GG structure. DFRFFLD increases the GG delay by adding two more inverters as delay elements. We investigated the effectiveness of the GG structure in 22 and 65 nm. In 22 nm, Kr (40.3 MeV-cm2/mg) and Xe (67.2 MeV-cm2/mg) irradiation tests revealed that DFRFFLD has sufficient soft-error tolerance in outer space. In 65 nm, the relationship between GG delay and CS reveals the GG delay time which no error was observed under Kr irradiation. |
| doi_str_mv | 10.1587/transele.2023CDP0004 |
| format | Article |
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The guard-gate (GG) structure in DFRFF mitigates soft errors. A single event transient (SET) pulse is removed by the C-element with the signal delayed by the GG structure. DFRFFLD increases the GG delay by adding two more inverters as delay elements. We investigated the effectiveness of the GG structure in 22 and 65 nm. In 22 nm, Kr (40.3 MeV-cm2/mg) and Xe (67.2 MeV-cm2/mg) irradiation tests revealed that DFRFFLD has sufficient soft-error tolerance in outer space. In 65 nm, the relationship between GG delay and CS reveals the GG delay time which no error was observed under Kr irradiation.</description><identifier>ISSN: 0916-8524</identifier><identifier>EISSN: 1745-1353</identifier><identifier>DOI: 10.1587/transele.2023CDP0004</identifier><language>eng</language><publisher>Tokyo: The Institute of Electronics, Information and Communication Engineers</publisher><subject>22 nm ; Delay time ; FD-SOI ; flip-flop ; guard-gate ; heavy ion ; Heavy ions ; Ion irradiation ; radiation-hard ; soft error ; Soft errors ; SOI (semiconductors)</subject><ispartof>IEICE Transactions on Electronics, 2024/07/01, Vol.E107.C(7), pp.191-200</ispartof><rights>2024 The Institute of Electronics, Information and Communication Engineers</rights><rights>Copyright Japan Science and Technology Agency 2024</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c472t-94b0364f1bb0714b8e3aed0b755ef1a77654155ecc8a1c8dfa1ff9db8b9a09e43</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,776,780,1877,27901,27902</link.rule.ids></links><search><creatorcontrib>NAKAJIMA, Ryuichi</creatorcontrib><creatorcontrib>ITO, Takafumi</creatorcontrib><creatorcontrib>SUGITANI, Shotaro</creatorcontrib><creatorcontrib>KII, Tomoya</creatorcontrib><creatorcontrib>EBARA, Mitsunori</creatorcontrib><creatorcontrib>FURUTA, Jun</creatorcontrib><creatorcontrib>KOBAYASHI, Kazutoshi</creatorcontrib><creatorcontrib>LOUVAT, Mathieu</creatorcontrib><creatorcontrib>JACQUET, Francois</creatorcontrib><creatorcontrib>ELOY, Jean-Christophe</creatorcontrib><creatorcontrib>MONTFORT, Olivier</creatorcontrib><creatorcontrib>JURE, Lionel</creatorcontrib><creatorcontrib>HUARD, Vincent</creatorcontrib><title>Soft-Error Tolerance by Guard-Gate Structures on Flip-Flops in 22 and 65 nm FD-SOI Technologies</title><title>IEICE Transactions on Electronics</title><addtitle>IEICE Trans. Electron.</addtitle><description>We evaluated soft-error tolerance by heavy-ion irradiation test on three-types of flip-flops (FFs) named the standard FF (STDFF), the dual feedback recovery FF (DFRFF), and the DFRFF with long delay (DFRFFLD) in 22 and 65 nm fully-depleted silicon on insulator (FD-SOI) technologies. The guard-gate (GG) structure in DFRFF mitigates soft errors. A single event transient (SET) pulse is removed by the C-element with the signal delayed by the GG structure. DFRFFLD increases the GG delay by adding two more inverters as delay elements. We investigated the effectiveness of the GG structure in 22 and 65 nm. In 22 nm, Kr (40.3 MeV-cm2/mg) and Xe (67.2 MeV-cm2/mg) irradiation tests revealed that DFRFFLD has sufficient soft-error tolerance in outer space. In 65 nm, the relationship between GG delay and CS reveals the GG delay time which no error was observed under Kr irradiation.</description><subject>22 nm</subject><subject>Delay time</subject><subject>FD-SOI</subject><subject>flip-flop</subject><subject>guard-gate</subject><subject>heavy ion</subject><subject>Heavy ions</subject><subject>Ion irradiation</subject><subject>radiation-hard</subject><subject>soft error</subject><subject>Soft errors</subject><subject>SOI (semiconductors)</subject><issn>0916-8524</issn><issn>1745-1353</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2024</creationdate><recordtype>article</recordtype><recordid>eNpNkEFPwjAYhhujiYj-Aw9NPBfbtVu3owGGJCQYwXPTdd9gZKyz7Q78e2cQ4ul7D8_zfsmL0DOjExan8jU43XpoYBLRiE9nH5RScYNGTIqYMB7zWzSiGUtIGkfiHj14f6CUpRHjI6Q2tgpk7px1eGsbGJoM4OKEF712JVnoAHgTXG9C78Bj2-K8qTuSN7bzuG5xFGHdljiJcXvE-Yxs1ku8BbNvbWN3NfhHdFfpxsPT3x2jr3y-nb6T1XqxnL6tiBEyCiQTBeWJqFhRUMlEkQLXUNJCxjFUTEuZxIIN2ZhUM5OWlWZVlZVFWmSaZiD4GL2ceztnv3vwQR1s79rhpeI041SwYYGBEmfKOOu9g0p1rj5qd1KMqt8p1WVK9W_KQfs8awcf9A6uknahNgN7leaMSjVV8hL-lVxhs9dOQct_AM4mhQM</recordid><startdate>20240701</startdate><enddate>20240701</enddate><creator>NAKAJIMA, Ryuichi</creator><creator>ITO, Takafumi</creator><creator>SUGITANI, Shotaro</creator><creator>KII, Tomoya</creator><creator>EBARA, Mitsunori</creator><creator>FURUTA, Jun</creator><creator>KOBAYASHI, Kazutoshi</creator><creator>LOUVAT, Mathieu</creator><creator>JACQUET, Francois</creator><creator>ELOY, Jean-Christophe</creator><creator>MONTFORT, Olivier</creator><creator>JURE, Lionel</creator><creator>HUARD, Vincent</creator><general>The Institute of Electronics, Information and Communication Engineers</general><general>Japan Science and Technology Agency</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>20240701</creationdate><title>Soft-Error Tolerance by Guard-Gate Structures on Flip-Flops in 22 and 65 nm FD-SOI Technologies</title><author>NAKAJIMA, Ryuichi ; ITO, Takafumi ; SUGITANI, Shotaro ; KII, Tomoya ; EBARA, Mitsunori ; FURUTA, Jun ; KOBAYASHI, Kazutoshi ; LOUVAT, Mathieu ; JACQUET, Francois ; ELOY, Jean-Christophe ; MONTFORT, Olivier ; JURE, Lionel ; HUARD, Vincent</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c472t-94b0364f1bb0714b8e3aed0b755ef1a77654155ecc8a1c8dfa1ff9db8b9a09e43</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2024</creationdate><topic>22 nm</topic><topic>Delay time</topic><topic>FD-SOI</topic><topic>flip-flop</topic><topic>guard-gate</topic><topic>heavy ion</topic><topic>Heavy ions</topic><topic>Ion irradiation</topic><topic>radiation-hard</topic><topic>soft error</topic><topic>Soft errors</topic><topic>SOI (semiconductors)</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>NAKAJIMA, Ryuichi</creatorcontrib><creatorcontrib>ITO, Takafumi</creatorcontrib><creatorcontrib>SUGITANI, Shotaro</creatorcontrib><creatorcontrib>KII, Tomoya</creatorcontrib><creatorcontrib>EBARA, Mitsunori</creatorcontrib><creatorcontrib>FURUTA, Jun</creatorcontrib><creatorcontrib>KOBAYASHI, Kazutoshi</creatorcontrib><creatorcontrib>LOUVAT, Mathieu</creatorcontrib><creatorcontrib>JACQUET, Francois</creatorcontrib><creatorcontrib>ELOY, Jean-Christophe</creatorcontrib><creatorcontrib>MONTFORT, Olivier</creatorcontrib><creatorcontrib>JURE, Lionel</creatorcontrib><creatorcontrib>HUARD, Vincent</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEICE Transactions on Electronics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>NAKAJIMA, Ryuichi</au><au>ITO, Takafumi</au><au>SUGITANI, Shotaro</au><au>KII, Tomoya</au><au>EBARA, Mitsunori</au><au>FURUTA, Jun</au><au>KOBAYASHI, Kazutoshi</au><au>LOUVAT, Mathieu</au><au>JACQUET, Francois</au><au>ELOY, Jean-Christophe</au><au>MONTFORT, Olivier</au><au>JURE, Lionel</au><au>HUARD, Vincent</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Soft-Error Tolerance by Guard-Gate Structures on Flip-Flops in 22 and 65 nm FD-SOI Technologies</atitle><jtitle>IEICE Transactions on Electronics</jtitle><addtitle>IEICE Trans. Electron.</addtitle><date>2024-07-01</date><risdate>2024</risdate><volume>E107.C</volume><issue>7</issue><spage>191</spage><epage>200</epage><pages>191-200</pages><artnum>2023CDP0004</artnum><issn>0916-8524</issn><eissn>1745-1353</eissn><abstract>We evaluated soft-error tolerance by heavy-ion irradiation test on three-types of flip-flops (FFs) named the standard FF (STDFF), the dual feedback recovery FF (DFRFF), and the DFRFF with long delay (DFRFFLD) in 22 and 65 nm fully-depleted silicon on insulator (FD-SOI) technologies. The guard-gate (GG) structure in DFRFF mitigates soft errors. A single event transient (SET) pulse is removed by the C-element with the signal delayed by the GG structure. DFRFFLD increases the GG delay by adding two more inverters as delay elements. We investigated the effectiveness of the GG structure in 22 and 65 nm. In 22 nm, Kr (40.3 MeV-cm2/mg) and Xe (67.2 MeV-cm2/mg) irradiation tests revealed that DFRFFLD has sufficient soft-error tolerance in outer space. In 65 nm, the relationship between GG delay and CS reveals the GG delay time which no error was observed under Kr irradiation.</abstract><cop>Tokyo</cop><pub>The Institute of Electronics, Information and Communication Engineers</pub><doi>10.1587/transele.2023CDP0004</doi><tpages>10</tpages><oa>free_for_read</oa></addata></record> |
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| subjects | 22 nm Delay time FD-SOI flip-flop guard-gate heavy ion Heavy ions Ion irradiation radiation-hard soft error Soft errors SOI (semiconductors) |
| title | Soft-Error Tolerance by Guard-Gate Structures on Flip-Flops in 22 and 65 nm FD-SOI Technologies |
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