Extending standard cell library for aging mitigation

Transistor aging, mostly due to bias temperature instability (BTI), is one of the major unreliability sources at nano-scale technology nodes. BTI causes the circuit delay to increase and eventually leads to a decrease in the circuit lifetime. Typically, standard cells in the library are optimised ac...

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Veröffentlicht in:	Chronic diseases and translational medicine 2015-07, Vol.9 (4), p.206-212
Hauptverfasser:	Kiamehr, Saman, Ebrahimi, Mojtaba, Firouzi, Farshad, Tahoori, Mehdi B
Format:	Artikel
Sprache:	eng
Schlagworte:	Aging aging mitigation bias temperature instability BTI circuit delay Circuits Computer simulation Delay Design Design engineering Efficiency extending standard cell library input signal probabilities internal node signal probabilities Libraries nanoscale technology nodes nonuniform extension realistic workloads Run time (computers) Simulation Special Issue: Designing with Uncertainty - Opportunities & Challenges standard cells timing margin reduction transistor aging Transistors Workload Workloads
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