Suppression of ambipolarity in tunnel-FETs using gate oxide as parameter: analysis and investigation
In this study, the authors present a double-gate tunnel field-effect transistor with dual gate oxide thickness (henceforth referred to as DOT-DGTFET) to suppress ambipolar current conduction (Iamb). Conventional n-type DGTFET conducts current for negative VGS also and poses a challenge for circuit d...
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Veröffentlicht in: | IET circuits, devices & systems devices & systems, 2020-05, Vol.14 (3), p.288-293 |
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creator | Afzal Ahmad, Syed Alam, Naushad |
description | In this study, the authors present a double-gate tunnel field-effect transistor with dual gate oxide thickness (henceforth referred to as DOT-DGTFET) to suppress ambipolar current conduction (Iamb). Conventional n-type DGTFET conducts current for negative VGS also and poses a challenge for circuit design. Conduction current in n-type DGTFET for negative VGS is referred to as ambipolar current (Iamb). In the proposed DOT-DGTFET structure, a thin gate oxide of 3 nm is used towards the source–channel junction and a thick gate oxide is used towards the drain–channel junction. Use of thicker gate oxide towards drain–channel junction suppresses Iamb significantly while only marginally affecting ION. Subsequently, the proposed technique for ambipolarity suppression is compared with some of the existing techniques and they observe that DOT-DGTFET suppresses ambipolarity significantly with minimal effect on the ON state current. |
doi_str_mv | 10.1049/iet-cds.2019.0053 |
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Conventional n-type DGTFET conducts current for negative VGS also and poses a challenge for circuit design. Conduction current in n-type DGTFET for negative VGS is referred to as ambipolar current (Iamb). In the proposed DOT-DGTFET structure, a thin gate oxide of 3 nm is used towards the source–channel junction and a thick gate oxide is used towards the drain–channel junction. Use of thicker gate oxide towards drain–channel junction suppresses Iamb significantly while only marginally affecting ION. Subsequently, the proposed technique for ambipolarity suppression is compared with some of the existing techniques and they observe that DOT-DGTFET suppresses ambipolarity significantly with minimal effect on the ON state current.</description><identifier>ISSN: 1751-858X</identifier><identifier>ISSN: 1751-8598</identifier><identifier>EISSN: 1751-8598</identifier><identifier>DOI: 10.1049/iet-cds.2019.0053</identifier><language>eng</language><publisher>Stevenage: The Institution of Engineering and Technology</publisher><subject>ambipolar current conduction suppression ; ambipolarity suppression ; Approximation ; Circuit design ; DOT-DGTFET structure ; double-gate tunnel field-effect transistor ; drain–channel junction ; dual gate oxide thickness ; Electrons ; Energy ; Field effect transistors ; Integrated circuits ; n-type DGTFET ; Research Article ; semiconductor device models ; semiconductor device noise ; Simulation ; source–channel junction ; thick gate oxide ; Transistors ; tunnel field-effect transistors ; tunnel-FET ; Tunnels</subject><ispartof>IET circuits, devices & systems, 2020-05, Vol.14 (3), p.288-293</ispartof><rights>The Institution of Engineering and Technology</rights><rights>2020 The Institution of Engineering and Technology</rights><rights>Copyright The Institution of Engineering & Technology 2020</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c4393-8b647847d1d896469c27bc45f480695c701761488b586b8a5edb303f24618ad93</citedby><cites>FETCH-LOGICAL-c4393-8b647847d1d896469c27bc45f480695c701761488b586b8a5edb303f24618ad93</cites><orcidid>0000-0002-1078-4879 ; 0000-0002-1636-7080</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://onlinelibrary.wiley.com/doi/pdf/10.1049%2Fiet-cds.2019.0053$$EPDF$$P50$$Gwiley$$H</linktopdf><linktohtml>$$Uhttps://onlinelibrary.wiley.com/doi/full/10.1049%2Fiet-cds.2019.0053$$EHTML$$P50$$Gwiley$$H</linktohtml><link.rule.ids>314,780,784,1417,11562,27924,27925,45574,45575,46052,46476</link.rule.ids><linktorsrc>$$Uhttps://onlinelibrary.wiley.com/doi/abs/10.1049%2Fiet-cds.2019.0053$$EView_record_in_Wiley-Blackwell$$FView_record_in_$$GWiley-Blackwell</linktorsrc></links><search><creatorcontrib>Afzal Ahmad, Syed</creatorcontrib><creatorcontrib>Alam, Naushad</creatorcontrib><title>Suppression of ambipolarity in tunnel-FETs using gate oxide as parameter: analysis and investigation</title><title>IET circuits, devices & systems</title><description>In this study, the authors present a double-gate tunnel field-effect transistor with dual gate oxide thickness (henceforth referred to as DOT-DGTFET) to suppress ambipolar current conduction (Iamb). Conventional n-type DGTFET conducts current for negative VGS also and poses a challenge for circuit design. Conduction current in n-type DGTFET for negative VGS is referred to as ambipolar current (Iamb). In the proposed DOT-DGTFET structure, a thin gate oxide of 3 nm is used towards the source–channel junction and a thick gate oxide is used towards the drain–channel junction. Use of thicker gate oxide towards drain–channel junction suppresses Iamb significantly while only marginally affecting ION. Subsequently, the proposed technique for ambipolarity suppression is compared with some of the existing techniques and they observe that DOT-DGTFET suppresses ambipolarity significantly with minimal effect on the ON state current.</description><subject>ambipolar current conduction suppression</subject><subject>ambipolarity suppression</subject><subject>Approximation</subject><subject>Circuit design</subject><subject>DOT-DGTFET structure</subject><subject>double-gate tunnel field-effect transistor</subject><subject>drain–channel junction</subject><subject>dual gate oxide thickness</subject><subject>Electrons</subject><subject>Energy</subject><subject>Field effect transistors</subject><subject>Integrated circuits</subject><subject>n-type DGTFET</subject><subject>Research Article</subject><subject>semiconductor device models</subject><subject>semiconductor device noise</subject><subject>Simulation</subject><subject>source–channel junction</subject><subject>thick gate oxide</subject><subject>Transistors</subject><subject>tunnel field-effect transistors</subject><subject>tunnel-FET</subject><subject>Tunnels</subject><issn>1751-858X</issn><issn>1751-8598</issn><issn>1751-8598</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2020</creationdate><recordtype>article</recordtype><recordid>eNqFkE9LwzAchosoOKcfwFvAk4fOpPnTZDedmwoDD5vgLaRNOjK6tiat2m9vymR4UDzld3ieNy9vFF0iOEGQiBtr2jjXfpJAJCYQUnwUjVBKUcyp4MeHm7-eRmfebwNBKWajSK-6pnHGe1tXoC6A2mW2qUvlbNsDW4G2qypTxov52oPO22oDNqo1oP602gDlQaOc2pnWuClQlSp7b304dFDfjW9tgEPweXRSqNKbi-93HL2EwNljvHx-eJrdLuOcYIFjnjGScpJqpLlghIk8SbOc0IJwyATNU4hShgjnGeUs44oanWGIi4QwxJUWeBxd7XMbV7914X-5rTsXanmJoUiSlHGCA4X2VO5q750pZOPsTrleIiiHMWUYU4Yx5TCmHMYMznTvfNjS9P8Lcna_Su4WELJkkK_38oAdGj3N1wP1w2l0Edj4F_bvYl-qNJdo</recordid><startdate>202005</startdate><enddate>202005</enddate><creator>Afzal Ahmad, Syed</creator><creator>Alam, Naushad</creator><general>The Institution of Engineering and Technology</general><general>John Wiley & Sons, Inc</general><scope>AAYXX</scope><scope>CITATION</scope><scope>JQ2</scope><orcidid>https://orcid.org/0000-0002-1078-4879</orcidid><orcidid>https://orcid.org/0000-0002-1636-7080</orcidid></search><sort><creationdate>202005</creationdate><title>Suppression of ambipolarity in tunnel-FETs using gate oxide as parameter: analysis and investigation</title><author>Afzal Ahmad, Syed ; Alam, Naushad</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c4393-8b647847d1d896469c27bc45f480695c701761488b586b8a5edb303f24618ad93</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2020</creationdate><topic>ambipolar current conduction suppression</topic><topic>ambipolarity suppression</topic><topic>Approximation</topic><topic>Circuit design</topic><topic>DOT-DGTFET structure</topic><topic>double-gate tunnel field-effect transistor</topic><topic>drain–channel junction</topic><topic>dual gate oxide thickness</topic><topic>Electrons</topic><topic>Energy</topic><topic>Field effect transistors</topic><topic>Integrated circuits</topic><topic>n-type DGTFET</topic><topic>Research Article</topic><topic>semiconductor device models</topic><topic>semiconductor device noise</topic><topic>Simulation</topic><topic>source–channel junction</topic><topic>thick gate oxide</topic><topic>Transistors</topic><topic>tunnel field-effect transistors</topic><topic>tunnel-FET</topic><topic>Tunnels</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Afzal Ahmad, Syed</creatorcontrib><creatorcontrib>Alam, Naushad</creatorcontrib><collection>CrossRef</collection><collection>ProQuest Computer Science Collection</collection><jtitle>IET circuits, devices & systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Afzal Ahmad, Syed</au><au>Alam, Naushad</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Suppression of ambipolarity in tunnel-FETs using gate oxide as parameter: analysis and investigation</atitle><jtitle>IET circuits, devices & systems</jtitle><date>2020-05</date><risdate>2020</risdate><volume>14</volume><issue>3</issue><spage>288</spage><epage>293</epage><pages>288-293</pages><issn>1751-858X</issn><issn>1751-8598</issn><eissn>1751-8598</eissn><abstract>In this study, the authors present a double-gate tunnel field-effect transistor with dual gate oxide thickness (henceforth referred to as DOT-DGTFET) to suppress ambipolar current conduction (Iamb). Conventional n-type DGTFET conducts current for negative VGS also and poses a challenge for circuit design. Conduction current in n-type DGTFET for negative VGS is referred to as ambipolar current (Iamb). In the proposed DOT-DGTFET structure, a thin gate oxide of 3 nm is used towards the source–channel junction and a thick gate oxide is used towards the drain–channel junction. Use of thicker gate oxide towards drain–channel junction suppresses Iamb significantly while only marginally affecting ION. Subsequently, the proposed technique for ambipolarity suppression is compared with some of the existing techniques and they observe that DOT-DGTFET suppresses ambipolarity significantly with minimal effect on the ON state current.</abstract><cop>Stevenage</cop><pub>The Institution of Engineering and Technology</pub><doi>10.1049/iet-cds.2019.0053</doi><tpages>6</tpages><orcidid>https://orcid.org/0000-0002-1078-4879</orcidid><orcidid>https://orcid.org/0000-0002-1636-7080</orcidid><oa>free_for_read</oa></addata></record> |
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subjects | ambipolar current conduction suppression ambipolarity suppression Approximation Circuit design DOT-DGTFET structure double-gate tunnel field-effect transistor drain–channel junction dual gate oxide thickness Electrons Energy Field effect transistors Integrated circuits n-type DGTFET Research Article semiconductor device models semiconductor device noise Simulation source–channel junction thick gate oxide Transistors tunnel field-effect transistors tunnel-FET Tunnels |
title | Suppression of ambipolarity in tunnel-FETs using gate oxide as parameter: analysis and investigation |
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