Fast transient low-dropout regulator with undershoot and settling time reduction technique

This article proposes an external capacitor-less low-dropout (LDO) regulator with undershoot and settling time reduction technique for fast transient response. In the proposed LDO, a feedback capacitor is applied instead of a complicated voltage-spike detection circuit to reduce undershoot voltage a...

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Veröffentlicht in:	IET circuits, devices & systems devices & systems, 2019-09, Vol.13 (6), p.783-786
Hauptverfasser:	Lee, Sung-Hwan, Kwon, Ickjin
Format:	Artikel
Sprache:	eng
Schlagworte:	adaptively biased single-stage error amplifier amplifiers Capacitors circuit stability CMOS integrated circuits CMOS process complicated voltage-spike detection circuit conventional LDO regulator cross-coupled pair current 0.1 mA current 3.0 muA detector circuits Electric potential external capacitor-less low-dropout regulator external capacitors fast transient low-dropout regulator fast transient response Feedback feedback capacitor gate charging current gate discharging current load transient response low quiescent current consumption low-power electronics minimum load current overshoot voltage reduction pass transistor quiescent current Research Article Settling settling time reduction technique size 0.18 mum Transient response Transistors undershoot voltage Voltage voltage regulators
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