ETRS: efficient turn restrictions setting method for boundary routers in chiplet-based systems

The implementation of turn restrictions represents a critical research challenge in chiplet-based systems, with the objective of achieving deadlock-free communication. Nevertheless, existing methodologies encounter difficulties in terms of computational complexity, which impedes the design process....

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Veröffentlicht in:	The Journal of supercomputing 2024-09, Vol.80 (14), p.20488-20517
Hauptverfasser:	Cao, Zhipeng, Guo, Wei, Wan, Zhiquan, Li, Peijie, Liu, Qinrang, Wang, Caining, Shao, Yangxue
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Compilers Computational efficiency Computer Science Computing costs Constrictions Interpreters Processor Architectures Programming Languages Routers Symmetry Topology
Online-Zugang:	Volltext
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