Time performance of Analog Pixel Test Structures with in-chip operational amplifier implemented in 65 nm CMOS imaging process

In the context of the CERN EP R&D on monolithic sensors and the ALICE ITS3 upgrade, the Tower Partners Semiconductor Co (TPSCo) 65 nm process has been qualified for use in high energy physics, and adopted for the ALICE ITS3 upgrade. An Analog Pixel Test Structure (APTS) featuring fast per pixel...

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Veröffentlicht in:	arXiv.org 2024-10
Hauptverfasser:	Rinella, Gianluca Aglieri, Aglietta, Luca, Antonelli, Matias, Barile, Francesco, Benotto, Franco, Beolè, Stefania Maria, Botta, Elena, Bruno, Giuseppe Eugenio, Carnesecchi, Francesca, Colella, Domenico, Colelli, Angelo, Contin, Giacomo, De Robertis, Giuseppe, Dumitrache, Florina, Elia, Domenico, Ferrero, Chiara, Fransen, Martin, Kluge, Alex, Kumar, Shyam, Lemoine, Corentin, Licciulli, Francesco, Lim, Bong-Hwi, Loddo, Flavio, Mager, Magnus, Marras, Davide, Martinengo, Paolo, Pastore, Cosimo, Patra, Rajendra Nath, Perciballi, Stefania, Piro, Francesco, Prino, Francesco, Ramello, Luciano, Torres Ramos, Arianna Grisel, Reidt, Felix, Russo, Roberto, Sarritzu, Valerio, Savino, Umberto, Schledewitz, David, Mariia Selina, Senyukov, Serhiy, Sitta, Mario, Snoeys, Walter, Sonneveld, Jory, Suljic, Miljenko, Triloki, Triloki, Turcato, Andrea
Format:	Artikel
Sprache:	eng
Schlagworte:	CMOS Electric fields Hadrons Operational amplifiers Particle beams Pixels Semiconductors Spatial resolution Time measurement
Online-Zugang:	Volltext
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