A Comprehensive Analysis of Nanosheet FET and its CMOS Circuit Applications at Elevated Temperatures

The Nanosheet Field Effect Transistor (NSFET) has been shown to be a viable candidate for sub-7-nm technology nodes. This paper assesses and compares the NSFET performance at elevated temperatures ranging from 25 0 to 200 0 C at both device and circuit levels. As the temperature increases from 25 0 to 200 0 C, the electron mobility is reduced by 68% due to the severe scattering mechanism. It is observed that the electrical performance degraded with rise in temperature. Moreover, the temperature variations on analog/RF FOMs like g m , intrinsic gain (A v0 ), cut-off frequency (f T ), intrinsic delay ( τ ), transconductance frequency product (TFP), gain bandwidth product (GBW), gain frequency product (GFP), and gain transconductance frequency product (GTFP) are studied and analyzed. In this move, at high temperatures, the degradation in analog/RF metrics is observed due to the reduction in carrier mobility. Further, the circuit-level performance is demonstrated at different temperatures. As temperature increases from 25 0 to 200 0 C, 91% and 49% degradation in propagation delay and gain is noticed for inverter, respectively. Further, there is a degradation of 1.6 × in oscillation frequency ( f osc ) is noticed for the 3-stage ring oscillator when the temperature increased from 25 0 to 200 0 C. The circuit level performance also deteriorated owing to the degradation of device’s performance at higher temperatures. Thus, the analyses will give deep insights into the performance of NSFET at both device and circuit levels at elevated temperatures.