Towards optimized tensor code generation for deep learning on sunway many-core processor

The flourish of deep learning frameworks and hardware platforms has been demanding an efficient compiler that can shield the diversity in both software and hardware in order to provide application portability. Among the existing deep learning compilers, TVM is well known for its efficiency in code g...

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Veröffentlicht in:	Frontiers of Computer Science 2024-04, Vol.18 (2), p.182101, Article 182101
Hauptverfasser:	LI, Mingzhen, LIU, Changxi, LIAO, Jianjin, ZHENG, Xuegui, YANG, Hailong, SUN, Rujun, XU, Jun, GAN, Lin, YANG, Guangwen, LUAN, Zhongzhi, QIAN, Depei
Format:	Artikel
Sprache:	eng
Schlagworte:	code generation Compilers Computer architecture Computer Science Deep learning deep learning compiler Hardware Microprocessors Network latency performance optimization Research Article sunway processor Tensors Workload Workloads
Online-Zugang:	Volltext
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