An area-efficient, robust, and reversible QCA-based Hamming code generator, error detector, and corrector: design and performance estimation

The inherent quasiadiabatic switching enabled by quantum-dot cellular automata (QCA) can realize transistorless computation to overcome the limitations of ultrascaled complementary metal–oxide–semiconductor (CMOS) technology. Reversible logic computing results in energy-efficient logic operations because of the bijective relation between inputs and outputs, leading to no loss of bit information. A highly area-efficient, robust, and reversible QCA-based Hamming code generator, error detector, and message corrector circuit is reported herein for the first time. Hamming codes are linear error-correcting codes that can detect up to two-bit errors and correct one-bit errors but without detection of uncorrected errors. To implement the circuit, Feynman reversible logic is employed along with coplanar crossovers having 180° clock zones. The proposed circuit is single layer, ensuring easier realization. Here, complexity analysis in terms of the cell count, area coverage, latency, quantum cost, number of garbage outputs, QCA circuit cost, hazard analysis, etc. is also carried out for all the proposed circuits. The designed circuits have a smaller cell count, with area coverage of approximately 29.5% and latency on the order of 0.5–2.75 clock periods. Moreover, these QCA based circuits provide strong evidence that reversible logic-based QCA circuits can be efficiently deployed for these error detecting and correcting codes.