CUDA-Optimized GPU Acceleration of 3GPP 3D Channel Model Simulations for 5G Network Planning

The simulation of massive multiple-input multiple-output (MIMO) channel models is becoming increasingly important for testing and validation of fifth-generation new radio (5G NR) wireless networks and beyond. However, simulation performance tends to be limited when modeling a large number of antenna...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:Electronics (Basel) 2023-08, Vol.12 (15), p.3214
Hauptverfasser: Shah, Nasir Ali, Lazarescu, Mihai T., Quasso, Roberto, Lavagno, Luciano
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue 15
container_start_page 3214
container_title Electronics (Basel)
container_volume 12
creator Shah, Nasir Ali
Lazarescu, Mihai T.
Quasso, Roberto
Lavagno, Luciano
description The simulation of massive multiple-input multiple-output (MIMO) channel models is becoming increasingly important for testing and validation of fifth-generation new radio (5G NR) wireless networks and beyond. However, simulation performance tends to be limited when modeling a large number of antenna elements combined with a complex and realistic representation of propagation conditions. In this paper, we propose an efficient implementation of a 3rd Generation Partnership Project (3GPP) three-dimensional (3D) channel model, specifically designed for graphics processing unit (GPU) platforms, with the goal of minimizing the computational time required for channel simulation. The channel model is highly parameterized to encompass a wide range of configurations required for real-world optimized 5G NR network deployments. We use several compute unified device architecture (CUDA)-based optimization techniques to exploit the parallelism and memory hierarchy of the GPU. Experimental data show that the developed system achieves an overall speedup of about 240× compared to the original C++ model executed on an Intel processor. Compared to a design previously accelerated on a datacenter-class field programmable gate array (FPGA), the GPU design has a 33.3% higher single-precision performance but a 7.5% higher power consumption. The proposed GPU accelerator can provide fast and accurate channel simulations for 5G NR network planning and optimization.
doi_str_mv 10.3390/electronics12153214
format Article
fullrecord <record><control><sourceid>gale_proqu</sourceid><recordid>TN_cdi_proquest_journals_2849024307</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><galeid>A760514592</galeid><sourcerecordid>A760514592</sourcerecordid><originalsourceid>FETCH-LOGICAL-c311t-2cbd54dbc07dedd7cdcea4e3a6fa0ff54c6b9051b30e45766cdb939b8d565b543</originalsourceid><addsrcrecordid>eNptUEtLw0AQDqJgqf0FXhY8p-4z6R5DqlGoGtDehLDZR92aZOtuiuivd7UePDgDM8PwPeBLknME54RweKk7LUfvBisDwogRjOhRMsEw5ynHHB__uU-TWQhbGIsjsiBwkjyX62WRPuxG29tPrUBVr0EhZdT0YrRuAM4AUtU1IEtQvohh0B24cyrOR9vvux9MAMZ5wCpwr8d3519B3UWgHTZnyYkRXdCz3z1N1tdXT-VNunqobstilUqC0Jhi2SpGVSthrrRSuVRSC6qJyIyAxjAqs5ZDhloCNWV5lknVcsLbhWIZaxkl0-TioLvz7m2vw9hs3d4P0bLBC8ohpgTmETU_oDai040djBu9kLGV7q10gzY2_os8i1aUcRwJ5ECQ3oXgtWl23vbCfzQINt_RN_9ET74AxcB43g</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2849024307</pqid></control><display><type>article</type><title>CUDA-Optimized GPU Acceleration of 3GPP 3D Channel Model Simulations for 5G Network Planning</title><source>MDPI - Multidisciplinary Digital Publishing Institute</source><source>Elektronische Zeitschriftenbibliothek - Frei zugängliche E-Journals</source><creator>Shah, Nasir Ali ; Lazarescu, Mihai T. ; Quasso, Roberto ; Lavagno, Luciano</creator><creatorcontrib>Shah, Nasir Ali ; Lazarescu, Mihai T. ; Quasso, Roberto ; Lavagno, Luciano</creatorcontrib><description>The simulation of massive multiple-input multiple-output (MIMO) channel models is becoming increasingly important for testing and validation of fifth-generation new radio (5G NR) wireless networks and beyond. However, simulation performance tends to be limited when modeling a large number of antenna elements combined with a complex and realistic representation of propagation conditions. In this paper, we propose an efficient implementation of a 3rd Generation Partnership Project (3GPP) three-dimensional (3D) channel model, specifically designed for graphics processing unit (GPU) platforms, with the goal of minimizing the computational time required for channel simulation. The channel model is highly parameterized to encompass a wide range of configurations required for real-world optimized 5G NR network deployments. We use several compute unified device architecture (CUDA)-based optimization techniques to exploit the parallelism and memory hierarchy of the GPU. Experimental data show that the developed system achieves an overall speedup of about 240× compared to the original C++ model executed on an Intel processor. Compared to a design previously accelerated on a datacenter-class field programmable gate array (FPGA), the GPU design has a 33.3% higher single-precision performance but a 7.5% higher power consumption. The proposed GPU accelerator can provide fast and accurate channel simulations for 5G NR network planning and optimization.</description><identifier>ISSN: 2079-9292</identifier><identifier>EISSN: 2079-9292</identifier><identifier>DOI: 10.3390/electronics12153214</identifier><language>eng</language><publisher>Basel: MDPI AG</publisher><subject>5G mobile communication ; Accuracy ; Antennas ; Antennas (Electronics) ; Communication ; Computer architecture ; Computing time ; Design ; Field programmable gate arrays ; Geometry ; Graphics processing units ; Internet of Things ; Mathematical optimization ; Microprocessors ; MIMO communications ; Optimization ; Optimization techniques ; Power consumption ; Propagation ; Simulation ; Three dimensional models ; Wave propagation ; Wireless networks</subject><ispartof>Electronics (Basel), 2023-08, Vol.12 (15), p.3214</ispartof><rights>COPYRIGHT 2023 MDPI AG</rights><rights>2023 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/). Notwithstanding the ProQuest Terms and Conditions, you may use this content in accordance with the terms of the License.</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c311t-2cbd54dbc07dedd7cdcea4e3a6fa0ff54c6b9051b30e45766cdb939b8d565b543</cites><orcidid>0000-0003-0884-5158 ; 0000-0002-9762-6522 ; 0000-0003-0847-7420 ; 0000-0003-2276-4960</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,776,780,27903,27904</link.rule.ids></links><search><creatorcontrib>Shah, Nasir Ali</creatorcontrib><creatorcontrib>Lazarescu, Mihai T.</creatorcontrib><creatorcontrib>Quasso, Roberto</creatorcontrib><creatorcontrib>Lavagno, Luciano</creatorcontrib><title>CUDA-Optimized GPU Acceleration of 3GPP 3D Channel Model Simulations for 5G Network Planning</title><title>Electronics (Basel)</title><description>The simulation of massive multiple-input multiple-output (MIMO) channel models is becoming increasingly important for testing and validation of fifth-generation new radio (5G NR) wireless networks and beyond. However, simulation performance tends to be limited when modeling a large number of antenna elements combined with a complex and realistic representation of propagation conditions. In this paper, we propose an efficient implementation of a 3rd Generation Partnership Project (3GPP) three-dimensional (3D) channel model, specifically designed for graphics processing unit (GPU) platforms, with the goal of minimizing the computational time required for channel simulation. The channel model is highly parameterized to encompass a wide range of configurations required for real-world optimized 5G NR network deployments. We use several compute unified device architecture (CUDA)-based optimization techniques to exploit the parallelism and memory hierarchy of the GPU. Experimental data show that the developed system achieves an overall speedup of about 240× compared to the original C++ model executed on an Intel processor. Compared to a design previously accelerated on a datacenter-class field programmable gate array (FPGA), the GPU design has a 33.3% higher single-precision performance but a 7.5% higher power consumption. The proposed GPU accelerator can provide fast and accurate channel simulations for 5G NR network planning and optimization.</description><subject>5G mobile communication</subject><subject>Accuracy</subject><subject>Antennas</subject><subject>Antennas (Electronics)</subject><subject>Communication</subject><subject>Computer architecture</subject><subject>Computing time</subject><subject>Design</subject><subject>Field programmable gate arrays</subject><subject>Geometry</subject><subject>Graphics processing units</subject><subject>Internet of Things</subject><subject>Mathematical optimization</subject><subject>Microprocessors</subject><subject>MIMO communications</subject><subject>Optimization</subject><subject>Optimization techniques</subject><subject>Power consumption</subject><subject>Propagation</subject><subject>Simulation</subject><subject>Three dimensional models</subject><subject>Wave propagation</subject><subject>Wireless networks</subject><issn>2079-9292</issn><issn>2079-9292</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><sourceid>BENPR</sourceid><recordid>eNptUEtLw0AQDqJgqf0FXhY8p-4z6R5DqlGoGtDehLDZR92aZOtuiuivd7UePDgDM8PwPeBLknME54RweKk7LUfvBisDwogRjOhRMsEw5ynHHB__uU-TWQhbGIsjsiBwkjyX62WRPuxG29tPrUBVr0EhZdT0YrRuAM4AUtU1IEtQvohh0B24cyrOR9vvux9MAMZ5wCpwr8d3519B3UWgHTZnyYkRXdCz3z1N1tdXT-VNunqobstilUqC0Jhi2SpGVSthrrRSuVRSC6qJyIyAxjAqs5ZDhloCNWV5lknVcsLbhWIZaxkl0-TioLvz7m2vw9hs3d4P0bLBC8ohpgTmETU_oDai040djBu9kLGV7q10gzY2_os8i1aUcRwJ5ECQ3oXgtWl23vbCfzQINt_RN_9ET74AxcB43g</recordid><startdate>20230801</startdate><enddate>20230801</enddate><creator>Shah, Nasir Ali</creator><creator>Lazarescu, Mihai T.</creator><creator>Quasso, Roberto</creator><creator>Lavagno, Luciano</creator><general>MDPI AG</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>8FE</scope><scope>8FG</scope><scope>ABUWG</scope><scope>AFKRA</scope><scope>ARAPS</scope><scope>AZQEC</scope><scope>BENPR</scope><scope>BGLVJ</scope><scope>CCPQU</scope><scope>DWQXO</scope><scope>HCIFZ</scope><scope>L7M</scope><scope>P5Z</scope><scope>P62</scope><scope>PIMPY</scope><scope>PQEST</scope><scope>PQQKQ</scope><scope>PQUKI</scope><orcidid>https://orcid.org/0000-0003-0884-5158</orcidid><orcidid>https://orcid.org/0000-0002-9762-6522</orcidid><orcidid>https://orcid.org/0000-0003-0847-7420</orcidid><orcidid>https://orcid.org/0000-0003-2276-4960</orcidid></search><sort><creationdate>20230801</creationdate><title>CUDA-Optimized GPU Acceleration of 3GPP 3D Channel Model Simulations for 5G Network Planning</title><author>Shah, Nasir Ali ; Lazarescu, Mihai T. ; Quasso, Roberto ; Lavagno, Luciano</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c311t-2cbd54dbc07dedd7cdcea4e3a6fa0ff54c6b9051b30e45766cdb939b8d565b543</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2023</creationdate><topic>5G mobile communication</topic><topic>Accuracy</topic><topic>Antennas</topic><topic>Antennas (Electronics)</topic><topic>Communication</topic><topic>Computer architecture</topic><topic>Computing time</topic><topic>Design</topic><topic>Field programmable gate arrays</topic><topic>Geometry</topic><topic>Graphics processing units</topic><topic>Internet of Things</topic><topic>Mathematical optimization</topic><topic>Microprocessors</topic><topic>MIMO communications</topic><topic>Optimization</topic><topic>Optimization techniques</topic><topic>Power consumption</topic><topic>Propagation</topic><topic>Simulation</topic><topic>Three dimensional models</topic><topic>Wave propagation</topic><topic>Wireless networks</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Shah, Nasir Ali</creatorcontrib><creatorcontrib>Lazarescu, Mihai T.</creatorcontrib><creatorcontrib>Quasso, Roberto</creatorcontrib><creatorcontrib>Lavagno, Luciano</creatorcontrib><collection>CrossRef</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest SciTech Collection</collection><collection>ProQuest Technology Collection</collection><collection>ProQuest Central (Alumni Edition)</collection><collection>ProQuest Central UK/Ireland</collection><collection>Advanced Technologies &amp; Aerospace Collection</collection><collection>ProQuest Central Essentials</collection><collection>ProQuest Central</collection><collection>Technology Collection</collection><collection>ProQuest One Community College</collection><collection>ProQuest Central Korea</collection><collection>SciTech Premium Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Advanced Technologies &amp; Aerospace Database</collection><collection>ProQuest Advanced Technologies &amp; Aerospace Collection</collection><collection>Publicly Available Content Database</collection><collection>ProQuest One Academic Eastern Edition (DO NOT USE)</collection><collection>ProQuest One Academic</collection><collection>ProQuest One Academic UKI Edition</collection><jtitle>Electronics (Basel)</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Shah, Nasir Ali</au><au>Lazarescu, Mihai T.</au><au>Quasso, Roberto</au><au>Lavagno, Luciano</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>CUDA-Optimized GPU Acceleration of 3GPP 3D Channel Model Simulations for 5G Network Planning</atitle><jtitle>Electronics (Basel)</jtitle><date>2023-08-01</date><risdate>2023</risdate><volume>12</volume><issue>15</issue><spage>3214</spage><pages>3214-</pages><issn>2079-9292</issn><eissn>2079-9292</eissn><abstract>The simulation of massive multiple-input multiple-output (MIMO) channel models is becoming increasingly important for testing and validation of fifth-generation new radio (5G NR) wireless networks and beyond. However, simulation performance tends to be limited when modeling a large number of antenna elements combined with a complex and realistic representation of propagation conditions. In this paper, we propose an efficient implementation of a 3rd Generation Partnership Project (3GPP) three-dimensional (3D) channel model, specifically designed for graphics processing unit (GPU) platforms, with the goal of minimizing the computational time required for channel simulation. The channel model is highly parameterized to encompass a wide range of configurations required for real-world optimized 5G NR network deployments. We use several compute unified device architecture (CUDA)-based optimization techniques to exploit the parallelism and memory hierarchy of the GPU. Experimental data show that the developed system achieves an overall speedup of about 240× compared to the original C++ model executed on an Intel processor. Compared to a design previously accelerated on a datacenter-class field programmable gate array (FPGA), the GPU design has a 33.3% higher single-precision performance but a 7.5% higher power consumption. The proposed GPU accelerator can provide fast and accurate channel simulations for 5G NR network planning and optimization.</abstract><cop>Basel</cop><pub>MDPI AG</pub><doi>10.3390/electronics12153214</doi><orcidid>https://orcid.org/0000-0003-0884-5158</orcidid><orcidid>https://orcid.org/0000-0002-9762-6522</orcidid><orcidid>https://orcid.org/0000-0003-0847-7420</orcidid><orcidid>https://orcid.org/0000-0003-2276-4960</orcidid><oa>free_for_read</oa></addata></record>
fulltext fulltext
identifier ISSN: 2079-9292
ispartof Electronics (Basel), 2023-08, Vol.12 (15), p.3214
issn 2079-9292
2079-9292
language eng
recordid cdi_proquest_journals_2849024307
source MDPI - Multidisciplinary Digital Publishing Institute; Elektronische Zeitschriftenbibliothek - Frei zugängliche E-Journals
subjects 5G mobile communication
Accuracy
Antennas
Antennas (Electronics)
Communication
Computer architecture
Computing time
Design
Field programmable gate arrays
Geometry
Graphics processing units
Internet of Things
Mathematical optimization
Microprocessors
MIMO communications
Optimization
Optimization techniques
Power consumption
Propagation
Simulation
Three dimensional models
Wave propagation
Wireless networks
title CUDA-Optimized GPU Acceleration of 3GPP 3D Channel Model Simulations for 5G Network Planning
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-27T05%3A35%3A26IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-gale_proqu&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=CUDA-Optimized%20GPU%20Acceleration%20of%203GPP%203D%20Channel%20Model%20Simulations%20for%205G%20Network%20Planning&rft.jtitle=Electronics%20(Basel)&rft.au=Shah,%20Nasir%20Ali&rft.date=2023-08-01&rft.volume=12&rft.issue=15&rft.spage=3214&rft.pages=3214-&rft.issn=2079-9292&rft.eissn=2079-9292&rft_id=info:doi/10.3390/electronics12153214&rft_dat=%3Cgale_proqu%3EA760514592%3C/gale_proqu%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2849024307&rft_id=info:pmid/&rft_galeid=A760514592&rfr_iscdi=true