A 1-μW/MHz RC Oscillator With Three-Point Trimmed 2.1-ppm/°C and Single-Point Trimmed 8.7-ppm/°C Stability From40 °C to 95 °C
This article presents techniques to improve the frequency stability of RC oscillators by performing first- and second-order temperature compensation without needing resistors with opposite temperature coefficients (TCs). Using the proposed three-point digital trim, a prototype 100-MHz frequency-lo...
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| Veröffentlicht in: | IEEE journal of solid-state circuits 2023-07, Vol.58 (7), p.2064-2074 |
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| container_title | IEEE journal of solid-state circuits |
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| creator | Park, Kyu-Sang Khashaba, Amr Abdelrahman, Ahmed Li, Yongxin Wang, Tianyu Xia, Ruhao Pal, Nilanjan Hanumolu, Pavan Kumar |
| description | This article presents techniques to improve the frequency stability of RC oscillators by performing first- and second-order temperature compensation without needing resistors with opposite temperature coefficients (TCs). Using the proposed three-point digital trim, a prototype 100-MHz frequency-locked loop (FLL)-based RC oscillator fabricated in a 65-nm CMOS process achieves an inaccuracy of ±140 ppm over −40 °C to 95 °C, 83-ppm/V voltage sensitivity, 1.3-ppm Allan deviation floor, and 1- \mu \text{W} /MHz power efficiency. When only a single-point trim is performed using a multiple linear regression model leveraging the strong correlation between three switched resistors, the frequency inaccuracy is ±587 ppm. |
| doi_str_mv | 10.1109/JSSC.2022.3227191 |
| format | Article |
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Using the proposed three-point digital trim, a prototype 100-MHz frequency-locked loop (FLL)-based <inline-formula> <tex-math notation="LaTeX">RC </tex-math></inline-formula> oscillator fabricated in a 65-nm CMOS process achieves an inaccuracy of ±140 ppm over −40 °C to 95 °C, 83-ppm/V voltage sensitivity, 1.3-ppm Allan deviation floor, and 1-<inline-formula> <tex-math notation="LaTeX">\mu \text{W} </tex-math></inline-formula>/MHz power efficiency. When only a single-point trim is performed using a multiple linear regression model leveraging the strong correlation between three switched resistors, the frequency inaccuracy is ±587 ppm.]]></description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/JSSC.2022.3227191</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject><italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">RC oscillator ; Delta-sigma modulator ; Frequency locked loops ; Frequency locking ; Frequency stability ; Oscillators ; Power efficiency ; pulse density modulation ; Regression models ; Resistance ; Resistors ; ring voltage-controlled oscillator (VCO) ; Sensitivity ; switched capacitor ; switched resistor ; Switches ; Temperature compensation ; Temperature sensors</subject><ispartof>IEEE journal of solid-state circuits, 2023-07, Vol.58 (7), p.2064-2074</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2023</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c2031-b3e3f539aea6ceaaf43dc9d18871732cd1cd237eb1ba7c9991acdef16c4780263</cites><orcidid>0000-0003-2515-4682 ; 0000-0003-1691-8986 ; 0000-0002-3456-2082 ; 0000-0003-3694-0160 ; 0000-0002-1260-7155 ; 0000-0001-7555-1382 ; 0000-0002-6771-7271 ; 0000-0003-3812-9793</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9987544$$EHTML$$P50$$Gieee$$Hfree_for_read</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids></links><search><creatorcontrib>Park, Kyu-Sang</creatorcontrib><creatorcontrib>Khashaba, Amr</creatorcontrib><creatorcontrib>Abdelrahman, Ahmed</creatorcontrib><creatorcontrib>Li, Yongxin</creatorcontrib><creatorcontrib>Wang, Tianyu</creatorcontrib><creatorcontrib>Xia, Ruhao</creatorcontrib><creatorcontrib>Pal, Nilanjan</creatorcontrib><creatorcontrib>Hanumolu, Pavan Kumar</creatorcontrib><title>A 1-μW/MHz RC Oscillator With Three-Point Trimmed 2.1-ppm/°C and Single-Point Trimmed 8.7-ppm/°C Stability From40 °C to 95 °C</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description><![CDATA[This article presents techniques to improve the frequency stability of <inline-formula> <tex-math notation="LaTeX">RC </tex-math></inline-formula> oscillators by performing first- and second-order temperature compensation without needing resistors with opposite temperature coefficients (TCs). Using the proposed three-point digital trim, a prototype 100-MHz frequency-locked loop (FLL)-based <inline-formula> <tex-math notation="LaTeX">RC </tex-math></inline-formula> oscillator fabricated in a 65-nm CMOS process achieves an inaccuracy of ±140 ppm over −40 °C to 95 °C, 83-ppm/V voltage sensitivity, 1.3-ppm Allan deviation floor, and 1-<inline-formula> <tex-math notation="LaTeX">\mu \text{W} </tex-math></inline-formula>/MHz power efficiency. When only a single-point trim is performed using a multiple linear regression model leveraging the strong correlation between three switched resistors, the frequency inaccuracy is ±587 ppm.]]></description><subject><italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">RC oscillator</subject><subject>Delta-sigma modulator</subject><subject>Frequency locked loops</subject><subject>Frequency locking</subject><subject>Frequency stability</subject><subject>Oscillators</subject><subject>Power efficiency</subject><subject>pulse density modulation</subject><subject>Regression models</subject><subject>Resistance</subject><subject>Resistors</subject><subject>ring voltage-controlled oscillator (VCO)</subject><subject>Sensitivity</subject><subject>switched capacitor</subject><subject>switched resistor</subject><subject>Switches</subject><subject>Temperature compensation</subject><subject>Temperature sensors</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><sourceid>ESBDL</sourceid><sourceid>RIE</sourceid><recordid>eNpdkE1OwzAQhS0EEqVwAMTGEuukHtup7WUVUQoqKiJFZRc5jkNTJU1xwqIsOREHYMUBOBOJWnXBan70vRm9h9AlEB-AqMF9FIU-JZT6jFIBCo5QD4JAeiDYyzHqEQLSU5SQU3RW16t25FxCD32OMHi_34vBw-QDP4V4Vpu8KHRTObzImyWeL5213mOVrxs8d3lZ2hRTH7zNphz8fIVYr1Mc5evX4j8kfXGAokYneZE3Wzx2VckJ7pZNhVXQdefoJNNFbS_2tY-exzfzcOJNZ7d34WjqGUoYeAmzLAuY0lYPjdU64yw1KgUpReuRmhRMSpmwCSRaGKUUaJPaDIaGC0nokPXR9e7uxlVv77Zu4lX17tbty5hKRjhwwUlLwY4yrqprZ7N40zrSbhsDibuo4y7quIs63kfdaq52mtxae-CVkiLgnP0BeX96lw</recordid><startdate>20230701</startdate><enddate>20230701</enddate><creator>Park, Kyu-Sang</creator><creator>Khashaba, Amr</creator><creator>Abdelrahman, Ahmed</creator><creator>Li, Yongxin</creator><creator>Wang, Tianyu</creator><creator>Xia, Ruhao</creator><creator>Pal, Nilanjan</creator><creator>Hanumolu, Pavan Kumar</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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Using the proposed three-point digital trim, a prototype 100-MHz frequency-locked loop (FLL)-based <inline-formula> <tex-math notation="LaTeX">RC </tex-math></inline-formula> oscillator fabricated in a 65-nm CMOS process achieves an inaccuracy of ±140 ppm over −40 °C to 95 °C, 83-ppm/V voltage sensitivity, 1.3-ppm Allan deviation floor, and 1-<inline-formula> <tex-math notation="LaTeX">\mu \text{W} </tex-math></inline-formula>/MHz power efficiency. When only a single-point trim is performed using a multiple linear regression model leveraging the strong correlation between three switched resistors, the frequency inaccuracy is ±587 ppm.]]></abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/JSSC.2022.3227191</doi><tpages>11</tpages><orcidid>https://orcid.org/0000-0003-2515-4682</orcidid><orcidid>https://orcid.org/0000-0003-1691-8986</orcidid><orcidid>https://orcid.org/0000-0002-3456-2082</orcidid><orcidid>https://orcid.org/0000-0003-3694-0160</orcidid><orcidid>https://orcid.org/0000-0002-1260-7155</orcidid><orcidid>https://orcid.org/0000-0001-7555-1382</orcidid><orcidid>https://orcid.org/0000-0002-6771-7271</orcidid><orcidid>https://orcid.org/0000-0003-3812-9793</orcidid><oa>free_for_read</oa></addata></record> |
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| ispartof | IEEE journal of solid-state circuits, 2023-07, Vol.58 (7), p.2064-2074 |
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| subjects | <italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">RC oscillator Delta-sigma modulator Frequency locked loops Frequency locking Frequency stability Oscillators Power efficiency pulse density modulation Regression models Resistance Resistors ring voltage-controlled oscillator (VCO) Sensitivity switched capacitor switched resistor Switches Temperature compensation Temperature sensors |
| title | A 1-μW/MHz RC Oscillator With Three-Point Trimmed 2.1-ppm/°C and Single-Point Trimmed 8.7-ppm/°C Stability From40 °C to 95 °C |
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