Analysis of MLI based FPGA using hybrid controller techniques for SHAF
To Performance and plan of a decoupled double synchronous reference frame (DDSRF) system which is studied to generate compensation power by shunt active filter (SAF) is studied in this work. The traditional direct power control theory and harmonics cancellation responsibility is unreliable under unb...
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description | To Performance and plan of a decoupled double synchronous reference frame (DDSRF) system which is studied to generate compensation power by shunt active filter (SAF) is studied in this work. The traditional direct power control theory and harmonics cancellation responsibility is unreliable under unbalanced sources and load The five level cascaded - multilevel inverter (FLC-MLI) shape is established to generate the sufficient compensation power In this paper the instantaneous real and reactive power (PQ) are represented as positive negative zero sequences and harmonics components which is to defeat unbalanced operation of load for double the angular frequency of reference signal generation. The reference signal measured point and compensation time is deviated due to delayed performance of signal generation control loop. The state delay controller (SDC) which is proposed to lower the lag in middle of the compensation power inserted and reference signal obtained. The effectiveness of proposed method mathematical analysis is done by using MATLAB/Simulink and verified by the experimental setup operating under unbalanced conditions. Field programmable gate array (XC3S500E-320F) has been made to activate the PWM for MLI for this power compensation |
doi_str_mv | 10.1063/5.0126178 |
format | Conference Proceeding |
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The traditional direct power control theory and harmonics cancellation responsibility is unreliable under unbalanced sources and load The five level cascaded - multilevel inverter (FLC-MLI) shape is established to generate the sufficient compensation power In this paper the instantaneous real and reactive power (PQ) are represented as positive negative zero sequences and harmonics components which is to defeat unbalanced operation of load for double the angular frequency of reference signal generation. The reference signal measured point and compensation time is deviated due to delayed performance of signal generation control loop. The state delay controller (SDC) which is proposed to lower the lag in middle of the compensation power inserted and reference signal obtained. The effectiveness of proposed method mathematical analysis is done by using MATLAB/Simulink and verified by the experimental setup operating under unbalanced conditions. Field programmable gate array (XC3S500E-320F) has been made to activate the PWM for MLI for this power compensation</description><identifier>ISSN: 0094-243X</identifier><identifier>EISSN: 1551-7616</identifier><identifier>DOI: 10.1063/5.0126178</identifier><identifier>CODEN: APCPCS</identifier><language>eng</language><publisher>Melville: American Institute of Physics</publisher><subject>Compensation ; Control theory ; Controllers ; Field programmable gate arrays ; Harmonics ; Mathematical analysis ; Power control ; Reactive power ; Reference signals ; Response time ; Sequences ; Signal generation ; Unbalance</subject><ispartof>AIP conference proceedings, 2023, Vol.2581 (1)</ispartof><rights>Author(s)</rights><rights>2023 Author(s). Published by AIP Publishing.</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://pubs.aip.org/acp/article-lookup/doi/10.1063/5.0126178$$EHTML$$P50$$Gscitation$$H</linktohtml><link.rule.ids>309,310,314,777,781,786,787,791,4498,23911,23912,25121,27905,27906,76133</link.rule.ids></links><search><contributor>Samikannu, Ravi</contributor><contributor>Olakanmi, Eyitayo Olatunde</contributor><creatorcontrib>Vinoth, K.</creatorcontrib><title>Analysis of MLI based FPGA using hybrid controller techniques for SHAF</title><title>AIP conference proceedings</title><description>To Performance and plan of a decoupled double synchronous reference frame (DDSRF) system which is studied to generate compensation power by shunt active filter (SAF) is studied in this work. The traditional direct power control theory and harmonics cancellation responsibility is unreliable under unbalanced sources and load The five level cascaded - multilevel inverter (FLC-MLI) shape is established to generate the sufficient compensation power In this paper the instantaneous real and reactive power (PQ) are represented as positive negative zero sequences and harmonics components which is to defeat unbalanced operation of load for double the angular frequency of reference signal generation. The reference signal measured point and compensation time is deviated due to delayed performance of signal generation control loop. The state delay controller (SDC) which is proposed to lower the lag in middle of the compensation power inserted and reference signal obtained. The effectiveness of proposed method mathematical analysis is done by using MATLAB/Simulink and verified by the experimental setup operating under unbalanced conditions. Field programmable gate array (XC3S500E-320F) has been made to activate the PWM for MLI for this power compensation</description><subject>Compensation</subject><subject>Control theory</subject><subject>Controllers</subject><subject>Field programmable gate arrays</subject><subject>Harmonics</subject><subject>Mathematical analysis</subject><subject>Power control</subject><subject>Reactive power</subject><subject>Reference signals</subject><subject>Response time</subject><subject>Sequences</subject><subject>Signal generation</subject><subject>Unbalance</subject><issn>0094-243X</issn><issn>1551-7616</issn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2023</creationdate><recordtype>conference_proceeding</recordtype><recordid>eNp9kEFLwzAAhYMoOKcH_0HAm9CZpEmaHMuw22CioIK3kDaJy6hNTTqh_96NDbx5epfvPd57ANxiNMOI5w9shjDhuBBnYIIZw1nBMT8HE4QkzQjNPy7BVUpbhIgsCjEBVdnpdkw-weDg03oFa52sgdXLooS75LtPuBnr6A1sQjfE0LY2wsE2m85_72yCLkT4uiyra3DhdJvszUmn4L16fJsvs_XzYjUv11mPuRgyImpqJG8MZ5ZhYWUtrTC1pKwhhBmKLNM6l1wQTGjjcsc0LxyvSY6tsajOp-DumNvHcCgwqG3Yxf2EpMjeVBAsKd1T90cqNX7Qgw-d6qP_0nFUPyEqpk4fqd64_2CM1OHUP0P-CyHtZzo</recordid><startdate>20230602</startdate><enddate>20230602</enddate><creator>Vinoth, K.</creator><general>American Institute of Physics</general><scope>8FD</scope><scope>H8D</scope><scope>L7M</scope></search><sort><creationdate>20230602</creationdate><title>Analysis of MLI based FPGA using hybrid controller techniques for SHAF</title><author>Vinoth, K.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-p168t-28b4d96cd65e518e9b9e8db945c225d40e5aa39682124cf3f5a67f6b231ede0b3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2023</creationdate><topic>Compensation</topic><topic>Control theory</topic><topic>Controllers</topic><topic>Field programmable gate arrays</topic><topic>Harmonics</topic><topic>Mathematical analysis</topic><topic>Power control</topic><topic>Reactive power</topic><topic>Reference signals</topic><topic>Response time</topic><topic>Sequences</topic><topic>Signal generation</topic><topic>Unbalance</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Vinoth, K.</creatorcontrib><collection>Technology Research Database</collection><collection>Aerospace Database</collection><collection>Advanced Technologies Database with Aerospace</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Vinoth, K.</au><au>Samikannu, Ravi</au><au>Olakanmi, Eyitayo Olatunde</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Analysis of MLI based FPGA using hybrid controller techniques for SHAF</atitle><btitle>AIP conference proceedings</btitle><date>2023-06-02</date><risdate>2023</risdate><volume>2581</volume><issue>1</issue><issn>0094-243X</issn><eissn>1551-7616</eissn><coden>APCPCS</coden><abstract>To Performance and plan of a decoupled double synchronous reference frame (DDSRF) system which is studied to generate compensation power by shunt active filter (SAF) is studied in this work. The traditional direct power control theory and harmonics cancellation responsibility is unreliable under unbalanced sources and load The five level cascaded - multilevel inverter (FLC-MLI) shape is established to generate the sufficient compensation power In this paper the instantaneous real and reactive power (PQ) are represented as positive negative zero sequences and harmonics components which is to defeat unbalanced operation of load for double the angular frequency of reference signal generation. The reference signal measured point and compensation time is deviated due to delayed performance of signal generation control loop. The state delay controller (SDC) which is proposed to lower the lag in middle of the compensation power inserted and reference signal obtained. The effectiveness of proposed method mathematical analysis is done by using MATLAB/Simulink and verified by the experimental setup operating under unbalanced conditions. Field programmable gate array (XC3S500E-320F) has been made to activate the PWM for MLI for this power compensation</abstract><cop>Melville</cop><pub>American Institute of Physics</pub><doi>10.1063/5.0126178</doi><tpages>18</tpages></addata></record> |
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subjects | Compensation Control theory Controllers Field programmable gate arrays Harmonics Mathematical analysis Power control Reactive power Reference signals Response time Sequences Signal generation Unbalance |
title | Analysis of MLI based FPGA using hybrid controller techniques for SHAF |
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