Study of Multicell Upsets in SRAM at a 5-nm Bulk FinFET Node

Single-port (SP) and two-port (TP) static random access memory (SRAM) designs in a 5-nm bulk FinFET node were tested for multicell upset (MCU) vulnerability against alpha particles, 14-MeV neutrons, thermal neutrons, and heavy ions with nominal and reduced supply voltages. MCU contributions to singl...

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Veröffentlicht in:IEEE transactions on nuclear science 2023-04, Vol.70 (4), p.401-409
Hauptverfasser: Pieper, Nicholas J., Xiong, Yoni, Feeley, Alexandra, Pasternak, John, Dodds, Nathaniel, Ball, D. R., Bhuva, Bharat L.
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container_end_page 409
container_issue 4
container_start_page 401
container_title IEEE transactions on nuclear science
container_volume 70
creator Pieper, Nicholas J.
Xiong, Yoni
Feeley, Alexandra
Pasternak, John
Dodds, Nathaniel
Ball, D. R.
Bhuva, Bharat L.
description Single-port (SP) and two-port (TP) static random access memory (SRAM) designs in a 5-nm bulk FinFET node were tested for multicell upset (MCU) vulnerability against alpha particles, 14-MeV neutrons, thermal neutrons, and heavy ions with nominal and reduced supply voltages. MCU contributions to single-event upset (SEU) rates and observed bitline (BL) upset ranges are presented for each particle as a function of supply voltage. Results show that MCUs account for a majority of events from high linear energy transfer (LET) particles and neutrons at lower supply voltages. MCU shapes are shown for various sizes of upset clusters.
doi_str_mv 10.1109/TNS.2023.3240318
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subjects Alpha particles
Alpha rays
Energy transfer
Heavy ions
Linear energy transfer (LET)
Neutrons
Single event upsets
Static random access memory
Thermal neutrons
title Study of Multicell Upsets in SRAM at a 5-nm Bulk FinFET Node
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