Hardware Emulation of Step-Down Converter Power Stages for Digital Control Design

This paper proposes a methodology of delivering the emulation hardware of several step-down converter power stages. The generalized emulator design methodology follows these steps: first, the power stage is described using an ordinary differential equation system; second, the ordinary differential e...

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Veröffentlicht in:Electronics (Basel) 2023-03, Vol.12 (6), p.1328
Hauptverfasser: Kirei, Botond Sandor, Farcas, Calin-Adrian, Chira, Cosmin, Ilie, Ionut-Alin, Neag, Marius
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container_issue 6
container_start_page 1328
container_title Electronics (Basel)
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creator Kirei, Botond Sandor
Farcas, Calin-Adrian
Chira, Cosmin
Ilie, Ionut-Alin
Neag, Marius
description This paper proposes a methodology of delivering the emulation hardware of several step-down converter power stages. The generalized emulator design methodology follows these steps: first, the power stage is described using an ordinary differential equation system; second, the ordinary differential equation system is solved using Euler’s method, and thus an accurate time-domain model is obtained; next, this time-domain model can be described using either general-purpose programming language (MATLAB, C, etc.) or hardware description language (VHDL, Verilog, etc.). As a result, the emulator has been created; validation of the emulator may be carried out by comparing it to SPICE transient simulations. Finally, the validated emulator can be implemented on the preferred target technology, either in a general-purpose processor or a field programmable gate array. As the emulator relies on the ordinary differential equation system of the power stage, it has better behavioral accuracy than the emulators based on average state space models. Moreover, this paper also presents the design methodology of a manually tuned proportional–integrative–derivative controller deployed on a field programmable gate array.
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The generalized emulator design methodology follows these steps: first, the power stage is described using an ordinary differential equation system; second, the ordinary differential equation system is solved using Euler’s method, and thus an accurate time-domain model is obtained; next, this time-domain model can be described using either general-purpose programming language (MATLAB, C, etc.) or hardware description language (VHDL, Verilog, etc.). As a result, the emulator has been created; validation of the emulator may be carried out by comparing it to SPICE transient simulations. Finally, the validated emulator can be implemented on the preferred target technology, either in a general-purpose processor or a field programmable gate array. As the emulator relies on the ordinary differential equation system of the power stage, it has better behavioral accuracy than the emulators based on average state space models. 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subjects Accuracy
Buck converters
Controllers
Design
Design and construction
Design engineering
Differential equations
Electric current converters
Emulators
Field programmable gate arrays
Hardware description languages
Methods
Microprocessors
Ordinary differential equations
Power
Programmable controllers
Programmable logic controllers
Programming languages
Simulation
State space models
Time domain analysis
title Hardware Emulation of Step-Down Converter Power Stages for Digital Control Design
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