Hardware Emulation of Step-Down Converter Power Stages for Digital Control Design
This paper proposes a methodology of delivering the emulation hardware of several step-down converter power stages. The generalized emulator design methodology follows these steps: first, the power stage is described using an ordinary differential equation system; second, the ordinary differential e...
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Veröffentlicht in: | Electronics (Basel) 2023-03, Vol.12 (6), p.1328 |
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creator | Kirei, Botond Sandor Farcas, Calin-Adrian Chira, Cosmin Ilie, Ionut-Alin Neag, Marius |
description | This paper proposes a methodology of delivering the emulation hardware of several step-down converter power stages. The generalized emulator design methodology follows these steps: first, the power stage is described using an ordinary differential equation system; second, the ordinary differential equation system is solved using Euler’s method, and thus an accurate time-domain model is obtained; next, this time-domain model can be described using either general-purpose programming language (MATLAB, C, etc.) or hardware description language (VHDL, Verilog, etc.). As a result, the emulator has been created; validation of the emulator may be carried out by comparing it to SPICE transient simulations. Finally, the validated emulator can be implemented on the preferred target technology, either in a general-purpose processor or a field programmable gate array. As the emulator relies on the ordinary differential equation system of the power stage, it has better behavioral accuracy than the emulators based on average state space models. Moreover, this paper also presents the design methodology of a manually tuned proportional–integrative–derivative controller deployed on a field programmable gate array. |
doi_str_mv | 10.3390/electronics12061328 |
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The generalized emulator design methodology follows these steps: first, the power stage is described using an ordinary differential equation system; second, the ordinary differential equation system is solved using Euler’s method, and thus an accurate time-domain model is obtained; next, this time-domain model can be described using either general-purpose programming language (MATLAB, C, etc.) or hardware description language (VHDL, Verilog, etc.). As a result, the emulator has been created; validation of the emulator may be carried out by comparing it to SPICE transient simulations. Finally, the validated emulator can be implemented on the preferred target technology, either in a general-purpose processor or a field programmable gate array. As the emulator relies on the ordinary differential equation system of the power stage, it has better behavioral accuracy than the emulators based on average state space models. Moreover, this paper also presents the design methodology of a manually tuned proportional–integrative–derivative controller deployed on a field programmable gate array.</description><identifier>ISSN: 2079-9292</identifier><identifier>EISSN: 2079-9292</identifier><identifier>DOI: 10.3390/electronics12061328</identifier><language>eng</language><publisher>Basel: MDPI AG</publisher><subject>Accuracy ; Buck converters ; Controllers ; Design ; Design and construction ; Design engineering ; Differential equations ; Electric current converters ; Emulators ; Field programmable gate arrays ; Hardware description languages ; Methods ; Microprocessors ; Ordinary differential equations ; Power ; Programmable controllers ; Programmable logic controllers ; Programming languages ; Simulation ; State space models ; Time domain analysis</subject><ispartof>Electronics (Basel), 2023-03, Vol.12 (6), p.1328</ispartof><rights>COPYRIGHT 2023 MDPI AG</rights><rights>2023 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/). Notwithstanding the ProQuest Terms and Conditions, you may use this content in accordance with the terms of the License.</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c361t-cc31216e675e5a8c8ec9f8052e521fd48658c9104709a304c47cda5526ee39193</citedby><cites>FETCH-LOGICAL-c361t-cc31216e675e5a8c8ec9f8052e521fd48658c9104709a304c47cda5526ee39193</cites><orcidid>0000-0003-2761-6318 ; 0000-0003-4605-5667</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,780,784,27924,27925</link.rule.ids></links><search><creatorcontrib>Kirei, Botond Sandor</creatorcontrib><creatorcontrib>Farcas, Calin-Adrian</creatorcontrib><creatorcontrib>Chira, Cosmin</creatorcontrib><creatorcontrib>Ilie, Ionut-Alin</creatorcontrib><creatorcontrib>Neag, Marius</creatorcontrib><title>Hardware Emulation of Step-Down Converter Power Stages for Digital Control Design</title><title>Electronics (Basel)</title><description>This paper proposes a methodology of delivering the emulation hardware of several step-down converter power stages. The generalized emulator design methodology follows these steps: first, the power stage is described using an ordinary differential equation system; second, the ordinary differential equation system is solved using Euler’s method, and thus an accurate time-domain model is obtained; next, this time-domain model can be described using either general-purpose programming language (MATLAB, C, etc.) or hardware description language (VHDL, Verilog, etc.). As a result, the emulator has been created; validation of the emulator may be carried out by comparing it to SPICE transient simulations. Finally, the validated emulator can be implemented on the preferred target technology, either in a general-purpose processor or a field programmable gate array. As the emulator relies on the ordinary differential equation system of the power stage, it has better behavioral accuracy than the emulators based on average state space models. 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subjects | Accuracy Buck converters Controllers Design Design and construction Design engineering Differential equations Electric current converters Emulators Field programmable gate arrays Hardware description languages Methods Microprocessors Ordinary differential equations Power Programmable controllers Programmable logic controllers Programming languages Simulation State space models Time domain analysis |
title | Hardware Emulation of Step-Down Converter Power Stages for Digital Control Design |
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