AppCiP: Energy-Efficient Approximate Convolution-in-Pixel Scheme for Neural Network Acceleration
Nowadays, always-on intelligent and self-powered visual perception systems have gained considerable attention and are widely used. However, capturing data and analyzing it via a backend/cloud processor are energy-intensive and long-latency, resulting in a memory bottleneck and low-speed feature extr...
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Veröffentlicht in: | IEEE journal on emerging and selected topics in circuits and systems 2023-03, Vol.13 (1), p.1-1 |
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description | Nowadays, always-on intelligent and self-powered visual perception systems have gained considerable attention and are widely used. However, capturing data and analyzing it via a backend/cloud processor are energy-intensive and long-latency, resulting in a memory bottleneck and low-speed feature extraction at the edge. This paper presents AppCiP architecture as a sensing and computing integration design to efficiently enable Artificial Intelligence (AI) on resource-limited sensing devices. AppCiP provides a number of unique capabilities, including instant and reconfigurable RGB to grayscale conversion, highly parallel analog convolution-in-pixel, and realizing low-precision quinary weight neural networks. These features significantly mitigate the overhead of analog-to-digital converters and analog buffers, leading to a considerable reduction in power consumption and area overhead. Our circuit-to-application co-simulation results demonstrate that AppCiP achieves ~3 orders of magnitude higher efficiency on power consumption compared with the fastest existing designs considering different CNN workloads. It reaches a frame rate of 3000 and an efficiency of ~4.12 TOp/s/W. The performance accuracy of the AppCiP architecture on different datasets such as SVHN, Pest, CIFAR-10, MHIST, and CBL Face detection is evaluated and compared with the state-of-the-art design. The obtained results exhibit the best results among other processing in/near pixel architectures, while AppCip only degrades the accuracy by less than 1% on average compared to the floating-point baseline. |
doi_str_mv | 10.1109/JETCAS.2023.3242167 |
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However, capturing data and analyzing it via a backend/cloud processor are energy-intensive and long-latency, resulting in a memory bottleneck and low-speed feature extraction at the edge. This paper presents AppCiP architecture as a sensing and computing integration design to efficiently enable Artificial Intelligence (AI) on resource-limited sensing devices. AppCiP provides a number of unique capabilities, including instant and reconfigurable RGB to grayscale conversion, highly parallel analog convolution-in-pixel, and realizing low-precision quinary weight neural networks. These features significantly mitigate the overhead of analog-to-digital converters and analog buffers, leading to a considerable reduction in power consumption and area overhead. Our circuit-to-application co-simulation results demonstrate that AppCiP achieves ~3 orders of magnitude higher efficiency on power consumption compared with the fastest existing designs considering different CNN workloads. It reaches a frame rate of 3000 and an efficiency of ~4.12 TOp/s/W. The performance accuracy of the AppCiP architecture on different datasets such as SVHN, Pest, CIFAR-10, MHIST, and CBL Face detection is evaluated and compared with the state-of-the-art design. The obtained results exhibit the best results among other processing in/near pixel architectures, while AppCip only degrades the accuracy by less than 1% on average compared to the floating-point baseline.</description><identifier>ISSN: 2156-3357</identifier><identifier>EISSN: 2156-3365</identifier><identifier>DOI: 10.1109/JETCAS.2023.3242167</identifier><identifier>CODEN: IJESLY</identifier><language>eng</language><publisher>Piscataway: IEEE</publisher><subject>Acceleration ; Accuracy ; Analog to digital converters ; approximate computing ; Artificial intelligence ; Circuits ; Circuits and systems ; CMOS image sensor ; Computer architecture ; Convolution ; Convolution-in-pixel ; convolutional neural network ; Convolutional neural networks ; Face recognition ; Feature extraction ; Floating point arithmetic ; Low speed ; Magnetic tunneling ; Microprocessors ; Network latency ; Neural networks ; Pixels ; Power consumption ; Power demand ; Power management ; Sensors ; Visual perception</subject><ispartof>IEEE journal on emerging and selected topics in circuits and systems, 2023-03, Vol.13 (1), p.1-1</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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However, capturing data and analyzing it via a backend/cloud processor are energy-intensive and long-latency, resulting in a memory bottleneck and low-speed feature extraction at the edge. This paper presents AppCiP architecture as a sensing and computing integration design to efficiently enable Artificial Intelligence (AI) on resource-limited sensing devices. AppCiP provides a number of unique capabilities, including instant and reconfigurable RGB to grayscale conversion, highly parallel analog convolution-in-pixel, and realizing low-precision quinary weight neural networks. These features significantly mitigate the overhead of analog-to-digital converters and analog buffers, leading to a considerable reduction in power consumption and area overhead. Our circuit-to-application co-simulation results demonstrate that AppCiP achieves ~3 orders of magnitude higher efficiency on power consumption compared with the fastest existing designs considering different CNN workloads. It reaches a frame rate of 3000 and an efficiency of ~4.12 TOp/s/W. The performance accuracy of the AppCiP architecture on different datasets such as SVHN, Pest, CIFAR-10, MHIST, and CBL Face detection is evaluated and compared with the state-of-the-art design. The obtained results exhibit the best results among other processing in/near pixel architectures, while AppCip only degrades the accuracy by less than 1% on average compared to the floating-point baseline.</description><subject>Acceleration</subject><subject>Accuracy</subject><subject>Analog to digital converters</subject><subject>approximate computing</subject><subject>Artificial intelligence</subject><subject>Circuits</subject><subject>Circuits and systems</subject><subject>CMOS image sensor</subject><subject>Computer architecture</subject><subject>Convolution</subject><subject>Convolution-in-pixel</subject><subject>convolutional neural network</subject><subject>Convolutional neural networks</subject><subject>Face recognition</subject><subject>Feature extraction</subject><subject>Floating point arithmetic</subject><subject>Low speed</subject><subject>Magnetic tunneling</subject><subject>Microprocessors</subject><subject>Network latency</subject><subject>Neural networks</subject><subject>Pixels</subject><subject>Power consumption</subject><subject>Power demand</subject><subject>Power management</subject><subject>Sensors</subject><subject>Visual perception</subject><issn>2156-3357</issn><issn>2156-3365</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpNUMtOwzAQtBBIVNAvgEMkzil-xgm3KCovVVCpcDZOugaXNC5OAu3f4yoVYi-7q5nZxyB0QfCEEJxdP05finwxoZiyCaOckkQeoRElIokZS8TxXy3kKRq37QqHEAlJOB-ht3yzKez8Jpo24N938dQYW1louigA3m3tWncQFa75dnXfWdfEtonndgt1tKg-YA2RcT56gt7rOqTux_nPKK8qqMHrPf8cnRhdtzA-5DP0ehsOvo9nz3cPRT6LK8bTLi4lY1xUNDRCGoxLxnAqsCBAyLIUzKTlUnKsteZZmWhhAMosY1hiXRINwM7Q1TA3XP3VQ9uplet9E1YqKtOMJ4JKGlhsYFXeta0HozY-vOh3imC1d1MNbqq9m-rgZlBdDioLAP8UmCU4wL-453Dp</recordid><startdate>20230301</startdate><enddate>20230301</enddate><creator>Tabrizchi, Sepehr</creator><creator>Nezhadi, Ali</creator><creator>Angizi, Shaahin</creator><creator>Roohi, Arman</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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It reaches a frame rate of 3000 and an efficiency of ~4.12 TOp/s/W. The performance accuracy of the AppCiP architecture on different datasets such as SVHN, Pest, CIFAR-10, MHIST, and CBL Face detection is evaluated and compared with the state-of-the-art design. The obtained results exhibit the best results among other processing in/near pixel architectures, while AppCip only degrades the accuracy by less than 1% on average compared to the floating-point baseline.</abstract><cop>Piscataway</cop><pub>IEEE</pub><doi>10.1109/JETCAS.2023.3242167</doi><tpages>1</tpages><orcidid>https://orcid.org/0000-0002-0900-8768</orcidid><orcidid>https://orcid.org/0000-0003-2289-6381</orcidid><orcidid>https://orcid.org/0000-0001-5105-3450</orcidid><orcidid>https://orcid.org/0000-0001-9394-2627</orcidid></addata></record> |
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subjects | Acceleration Accuracy Analog to digital converters approximate computing Artificial intelligence Circuits Circuits and systems CMOS image sensor Computer architecture Convolution Convolution-in-pixel convolutional neural network Convolutional neural networks Face recognition Feature extraction Floating point arithmetic Low speed Magnetic tunneling Microprocessors Network latency Neural networks Pixels Power consumption Power demand Power management Sensors Visual perception |
title | AppCiP: Energy-Efficient Approximate Convolution-in-Pixel Scheme for Neural Network Acceleration |
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