Design of power-efficient CMOS based oscillator circuit with varactor tuning control

This paper presents a low-power, wide tuning range CMOS voltage-controlled oscillator with MCML (MOS current mode logic) differential delay cell. Voltage controlled oscillator (VCO) circuit is designed in TSMC 0.25 μm CMOS process. To achieve the broad frequency range concept of variable capacitance...

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Veröffentlicht in:SN applied sciences 2021-04, Vol.3 (4), p.487, Article 487
Hauptverfasser: Dwivedi, Dileep, Kumar, Manoj, Niranjan, Vandana
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Sprache:eng
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Zusammenfassung:This paper presents a low-power, wide tuning range CMOS voltage-controlled oscillator with MCML (MOS current mode logic) differential delay cell. Voltage controlled oscillator (VCO) circuit is designed in TSMC 0.25 μm CMOS process. To achieve the broad frequency range concept of variable capacitance is employed in the proposed VCO circuit. Source/drain tuning voltage (V tune ) and body bias voltage (V b ) of I-MOS varactor are used to achieve variable capacitance at different I-MOS varactor widths (W). The dual control voltage of I-MOS varactor results in a tuning range from 0.528 GHz to 2.014 GHz. VCO's figure of merit (FoM) is 152.13 dBc/Hz with phase noise of −93.77 dBc/Hz at 1 MHz offset from the oscillation frequency. The proposed VCO dissipates maximum power of 3.127 mW.
ISSN:2523-3963
2523-3971
DOI:10.1007/s42452-021-04501-y