Simplified Compressor and Encoder Designs for Low-Cost Approximate Radix-4 Booth Multiplier
In this brief, we present a novel design methodology of cost-effective approximate radix-4 Booth multipliers, which can significantly reduce the power consumption of error-resilient signal processing tasks. In contrast that the prior studies only focus on the approximation of either the partial prod...
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Veröffentlicht in: | IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2023-03, Vol.70 (3), p.1154-1158 |
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creator | Park, Gunho Kung, Jaeha Lee, Youngjoo |
description | In this brief, we present a novel design methodology of cost-effective approximate radix-4 Booth multipliers, which can significantly reduce the power consumption of error-resilient signal processing tasks. In contrast that the prior studies only focus on the approximation of either the partial product generation with encoders or the partial product reductions with compressors, the proposed method considers two major processing steps jointly by forcing the generated error directions to be opposite to each other. As the internal errors are naturally balanced to have zero mean, as a result, the proposed approximate Booth multiplier can minimize the required processing energy under the same number of approximate bits compared to the previous designs. Simulation results on FIR filtering and image classification applications reveal that the proposed approximate Booth multiplier shows the most attractive energy-performance trade-offs, achieving 28% and 34% of energy reduction compared to the exact Booth multiplier, respectively, with negligible accuracy loss. |
doi_str_mv | 10.1109/TCSII.2022.3217696 |
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In contrast that the prior studies only focus on the approximation of either the partial product generation with encoders or the partial product reductions with compressors, the proposed method considers two major processing steps jointly by forcing the generated error directions to be opposite to each other. As the internal errors are naturally balanced to have zero mean, as a result, the proposed approximate Booth multiplier can minimize the required processing energy under the same number of approximate bits compared to the previous designs. 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Simulation results on FIR filtering and image classification applications reveal that the proposed approximate Booth multiplier shows the most attractive energy-performance trade-offs, achieving 28% and 34% of energy reduction compared to the exact Booth multiplier, respectively, with negligible accuracy loss.</description><subject>approximate booth encoder</subject><subject>approximate booth multiplier</subject><subject>approximate compressor</subject><subject>Approximate computing</subject><subject>Coders</subject><subject>Compressors</subject><subject>Costs</subject><subject>Encoding</subject><subject>Energy efficiency</subject><subject>Filtering</subject><subject>Hardware</subject><subject>Image classification</subject><subject>Image filters</subject><subject>Logic gates</subject><subject>Multipliers</subject><subject>Power consumption</subject><subject>Signal processing</subject><subject>Sports</subject><issn>1549-7747</issn><issn>1558-3791</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kM1OwzAQhC0EEqXwAnCxxDnFv7F9LKFApSIkWk4cohCvwVVbBzsV5e1JaMVpR6uZ2dWH0CUlI0qJuVkU8-l0xAhjI86oyk1-hAZUSp1xZehxr4XJlBLqFJ2ltCSEGcLZAL3N_bpZeefB4iKsmwgphYirjcWTTR0sRHwHyX9sEnbdfha-syKkFo-bJoadX1ct4JfK-l0m8G0I7Sd-2q5a31VCPEcnrloluDjMIXq9nyyKx2z2_DAtxrOsZka2mSS6EuAkIURqDc6oTlOtnTOQSyatsbyiFqxQxoC0uhbk3VBLGamt5IwP0fW-t3vpawupLZdhGzfdyZIpLXKec9G72N5Vx5BSBFc2sfs__pSUlD3E8g9i2UMsDxC70NU-5AHgP2AMp5wr_gv8o21-</recordid><startdate>20230301</startdate><enddate>20230301</enddate><creator>Park, Gunho</creator><creator>Kung, Jaeha</creator><creator>Lee, Youngjoo</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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II, Express briefs</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Park, Gunho</au><au>Kung, Jaeha</au><au>Lee, Youngjoo</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Simplified Compressor and Encoder Designs for Low-Cost Approximate Radix-4 Booth Multiplier</atitle><jtitle>IEEE transactions on circuits and systems. II, Express briefs</jtitle><stitle>TCSII</stitle><date>2023-03-01</date><risdate>2023</risdate><volume>70</volume><issue>3</issue><spage>1154</spage><epage>1158</epage><pages>1154-1158</pages><issn>1549-7747</issn><eissn>1558-3791</eissn><coden>ITCSFK</coden><abstract>In this brief, we present a novel design methodology of cost-effective approximate radix-4 Booth multipliers, which can significantly reduce the power consumption of error-resilient signal processing tasks. In contrast that the prior studies only focus on the approximation of either the partial product generation with encoders or the partial product reductions with compressors, the proposed method considers two major processing steps jointly by forcing the generated error directions to be opposite to each other. As the internal errors are naturally balanced to have zero mean, as a result, the proposed approximate Booth multiplier can minimize the required processing energy under the same number of approximate bits compared to the previous designs. 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subjects | approximate booth encoder approximate booth multiplier approximate compressor Approximate computing Coders Compressors Costs Encoding Energy efficiency Filtering Hardware Image classification Image filters Logic gates Multipliers Power consumption Signal processing Sports |
title | Simplified Compressor and Encoder Designs for Low-Cost Approximate Radix-4 Booth Multiplier |
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