A 40-nm Cryo-CMOS Quantum Controller IC for Superconducting Qubit
This article presents a cryo-CMOS quantum controller IC for superconducting qubits. The proposed globally synchronized clock system internally generates different local oscillator (LO) frequencies using multiple phase-locked loops (PLLs) driven by a common reference clock. It provides flexibility in...
Gespeichert in:
| Veröffentlicht in: | IEEE journal of solid-state circuits 2022-11, Vol.57 (11), p.3274-3287 |
|---|---|
| Hauptverfasser: | , , , , , , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 3287 |
|---|---|
| container_issue | 11 |
| container_start_page | 3274 |
| container_title | IEEE journal of solid-state circuits |
| container_volume | 57 |
| creator | Kang, Kiseo Minn, Donggyu Bae, Seongun Lee, Jaeho Kang, Seokhyeong Lee, Moonjoo Song, Ho-Jin Sim, Jae-Yoon |
| description | This article presents a cryo-CMOS quantum controller IC for superconducting qubits. The proposed globally synchronized clock system internally generates different local oscillator (LO) frequencies using multiple phase-locked loops (PLLs) driven by a common reference clock. It provides flexibility in spectral management as well as scalability for expansion to a large-scale quantum controller. The test chip includes two PLLs, four pulse modulator channels, and two receiver channels. Implemented chip in 40-nm CMOS shows full functionalities at 3.5 K. The designed pulse modulator circuits are verified with the specifications for expected fidelity of 99.99%. |
| doi_str_mv | 10.1109/JSSC.2022.3198663 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_ieee_</sourceid><recordid>TN_cdi_proquest_journals_2727044938</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9866927</ieee_id><sourcerecordid>2727044938</sourcerecordid><originalsourceid>FETCH-LOGICAL-c336t-76395a988562770a2bc4e8872ad52640c19bb4d8ce754d6d61a3d8738ab590fd3</originalsourceid><addsrcrecordid>eNo9kE1Lw0AQhhdRsFZ_gHgJeN643x_HErRWKkWi4G3Z7G4kpc3WTXLovzehxdMwM887Aw8A9xjlGCP99FaWRU4QITnFWglBL8AMc64glvT7EswQwgpqgtA1uOm67dgypvAMLBYZQ7DdZ0U6Rli8b8rsY7BtP4yT2PYp7nYhZasiq2PKyuEQkoutH1zftD8jWTX9Lbiq7a4Ld-c6B18vz5_FK1xvlqtisYaOUtFDKajmVivFBZESWVI5FpSSxHpOBEMO66piXrkgOfPCC2ypV5IqW3GNak_n4PF095Di7xC63mzjkNrxpSGSSMSYpmqk8IlyKXZdCrU5pGZv09FgZCZTZjJlJlPmbGrMPJwyTQjhn592mkj6BwSxYg4</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2727044938</pqid></control><display><type>article</type><title>A 40-nm Cryo-CMOS Quantum Controller IC for Superconducting Qubit</title><source>IEEE Electronic Library (IEL)</source><creator>Kang, Kiseo ; Minn, Donggyu ; Bae, Seongun ; Lee, Jaeho ; Kang, Seokhyeong ; Lee, Moonjoo ; Song, Ho-Jin ; Sim, Jae-Yoon</creator><creatorcontrib>Kang, Kiseo ; Minn, Donggyu ; Bae, Seongun ; Lee, Jaeho ; Kang, Seokhyeong ; Lee, Moonjoo ; Song, Ho-Jin ; Sim, Jae-Yoon</creatorcontrib><description>This article presents a cryo-CMOS quantum controller IC for superconducting qubits. The proposed globally synchronized clock system internally generates different local oscillator (LO) frequencies using multiple phase-locked loops (PLLs) driven by a common reference clock. It provides flexibility in spectral management as well as scalability for expansion to a large-scale quantum controller. The test chip includes two PLLs, four pulse modulator channels, and two receiver channels. Implemented chip in 40-nm CMOS shows full functionalities at 3.5 K. The designed pulse modulator circuits are verified with the specifications for expected fidelity of 99.99%.</description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/JSSC.2022.3198663</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Channels ; Circuit design ; Clock systems ; Clocks ; CMOS ; Controllers ; Cryo-CMOS ; Cryogenic electronics ; direct digital synthesis (DDS) ; Integrated circuits ; Phase locked loops ; Quantum computing ; quantum controller ; Qubit ; Qubits (quantum computing) ; Superconducting integrated circuits ; Superconducting microwave devices ; superconducting qubit ; Superconductivity</subject><ispartof>IEEE journal of solid-state circuits, 2022-11, Vol.57 (11), p.3274-3287</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2022</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c336t-76395a988562770a2bc4e8872ad52640c19bb4d8ce754d6d61a3d8738ab590fd3</citedby><cites>FETCH-LOGICAL-c336t-76395a988562770a2bc4e8872ad52640c19bb4d8ce754d6d61a3d8738ab590fd3</cites><orcidid>0000-0003-3015-1806 ; 0000-0001-6423-3389 ; 0000-0003-1814-6211 ; 0000-0002-2122-1481 ; 0000-0002-0839-0715 ; 0000-0002-3007-2107</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9866927$$EHTML$$P50$$Gieee$$Hfree_for_read</linktohtml><link.rule.ids>314,776,780,792,27903,27904,54736</link.rule.ids></links><search><creatorcontrib>Kang, Kiseo</creatorcontrib><creatorcontrib>Minn, Donggyu</creatorcontrib><creatorcontrib>Bae, Seongun</creatorcontrib><creatorcontrib>Lee, Jaeho</creatorcontrib><creatorcontrib>Kang, Seokhyeong</creatorcontrib><creatorcontrib>Lee, Moonjoo</creatorcontrib><creatorcontrib>Song, Ho-Jin</creatorcontrib><creatorcontrib>Sim, Jae-Yoon</creatorcontrib><title>A 40-nm Cryo-CMOS Quantum Controller IC for Superconducting Qubit</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description>This article presents a cryo-CMOS quantum controller IC for superconducting qubits. The proposed globally synchronized clock system internally generates different local oscillator (LO) frequencies using multiple phase-locked loops (PLLs) driven by a common reference clock. It provides flexibility in spectral management as well as scalability for expansion to a large-scale quantum controller. The test chip includes two PLLs, four pulse modulator channels, and two receiver channels. Implemented chip in 40-nm CMOS shows full functionalities at 3.5 K. The designed pulse modulator circuits are verified with the specifications for expected fidelity of 99.99%.</description><subject>Channels</subject><subject>Circuit design</subject><subject>Clock systems</subject><subject>Clocks</subject><subject>CMOS</subject><subject>Controllers</subject><subject>Cryo-CMOS</subject><subject>Cryogenic electronics</subject><subject>direct digital synthesis (DDS)</subject><subject>Integrated circuits</subject><subject>Phase locked loops</subject><subject>Quantum computing</subject><subject>quantum controller</subject><subject>Qubit</subject><subject>Qubits (quantum computing)</subject><subject>Superconducting integrated circuits</subject><subject>Superconducting microwave devices</subject><subject>superconducting qubit</subject><subject>Superconductivity</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2022</creationdate><recordtype>article</recordtype><sourceid>ESBDL</sourceid><sourceid>RIE</sourceid><recordid>eNo9kE1Lw0AQhhdRsFZ_gHgJeN643x_HErRWKkWi4G3Z7G4kpc3WTXLovzehxdMwM887Aw8A9xjlGCP99FaWRU4QITnFWglBL8AMc64glvT7EswQwgpqgtA1uOm67dgypvAMLBYZQ7DdZ0U6Rli8b8rsY7BtP4yT2PYp7nYhZasiq2PKyuEQkoutH1zftD8jWTX9Lbiq7a4Ld-c6B18vz5_FK1xvlqtisYaOUtFDKajmVivFBZESWVI5FpSSxHpOBEMO66piXrkgOfPCC2ypV5IqW3GNak_n4PF095Di7xC63mzjkNrxpSGSSMSYpmqk8IlyKXZdCrU5pGZv09FgZCZTZjJlJlPmbGrMPJwyTQjhn592mkj6BwSxYg4</recordid><startdate>20221101</startdate><enddate>20221101</enddate><creator>Kang, Kiseo</creator><creator>Minn, Donggyu</creator><creator>Bae, Seongun</creator><creator>Lee, Jaeho</creator><creator>Kang, Seokhyeong</creator><creator>Lee, Moonjoo</creator><creator>Song, Ho-Jin</creator><creator>Sim, Jae-Yoon</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>ESBDL</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0003-3015-1806</orcidid><orcidid>https://orcid.org/0000-0001-6423-3389</orcidid><orcidid>https://orcid.org/0000-0003-1814-6211</orcidid><orcidid>https://orcid.org/0000-0002-2122-1481</orcidid><orcidid>https://orcid.org/0000-0002-0839-0715</orcidid><orcidid>https://orcid.org/0000-0002-3007-2107</orcidid></search><sort><creationdate>20221101</creationdate><title>A 40-nm Cryo-CMOS Quantum Controller IC for Superconducting Qubit</title><author>Kang, Kiseo ; Minn, Donggyu ; Bae, Seongun ; Lee, Jaeho ; Kang, Seokhyeong ; Lee, Moonjoo ; Song, Ho-Jin ; Sim, Jae-Yoon</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c336t-76395a988562770a2bc4e8872ad52640c19bb4d8ce754d6d61a3d8738ab590fd3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2022</creationdate><topic>Channels</topic><topic>Circuit design</topic><topic>Clock systems</topic><topic>Clocks</topic><topic>CMOS</topic><topic>Controllers</topic><topic>Cryo-CMOS</topic><topic>Cryogenic electronics</topic><topic>direct digital synthesis (DDS)</topic><topic>Integrated circuits</topic><topic>Phase locked loops</topic><topic>Quantum computing</topic><topic>quantum controller</topic><topic>Qubit</topic><topic>Qubits (quantum computing)</topic><topic>Superconducting integrated circuits</topic><topic>Superconducting microwave devices</topic><topic>superconducting qubit</topic><topic>Superconductivity</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Kang, Kiseo</creatorcontrib><creatorcontrib>Minn, Donggyu</creatorcontrib><creatorcontrib>Bae, Seongun</creatorcontrib><creatorcontrib>Lee, Jaeho</creatorcontrib><creatorcontrib>Kang, Seokhyeong</creatorcontrib><creatorcontrib>Lee, Moonjoo</creatorcontrib><creatorcontrib>Song, Ho-Jin</creatorcontrib><creatorcontrib>Sim, Jae-Yoon</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE Open Access Journals</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Kang, Kiseo</au><au>Minn, Donggyu</au><au>Bae, Seongun</au><au>Lee, Jaeho</au><au>Kang, Seokhyeong</au><au>Lee, Moonjoo</au><au>Song, Ho-Jin</au><au>Sim, Jae-Yoon</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 40-nm Cryo-CMOS Quantum Controller IC for Superconducting Qubit</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>2022-11-01</date><risdate>2022</risdate><volume>57</volume><issue>11</issue><spage>3274</spage><epage>3287</epage><pages>3274-3287</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>This article presents a cryo-CMOS quantum controller IC for superconducting qubits. The proposed globally synchronized clock system internally generates different local oscillator (LO) frequencies using multiple phase-locked loops (PLLs) driven by a common reference clock. It provides flexibility in spectral management as well as scalability for expansion to a large-scale quantum controller. The test chip includes two PLLs, four pulse modulator channels, and two receiver channels. Implemented chip in 40-nm CMOS shows full functionalities at 3.5 K. The designed pulse modulator circuits are verified with the specifications for expected fidelity of 99.99%.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/JSSC.2022.3198663</doi><tpages>14</tpages><orcidid>https://orcid.org/0000-0003-3015-1806</orcidid><orcidid>https://orcid.org/0000-0001-6423-3389</orcidid><orcidid>https://orcid.org/0000-0003-1814-6211</orcidid><orcidid>https://orcid.org/0000-0002-2122-1481</orcidid><orcidid>https://orcid.org/0000-0002-0839-0715</orcidid><orcidid>https://orcid.org/0000-0002-3007-2107</orcidid><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 0018-9200 |
| ispartof | IEEE journal of solid-state circuits, 2022-11, Vol.57 (11), p.3274-3287 |
| issn | 0018-9200 1558-173X |
| language | eng |
| recordid | cdi_proquest_journals_2727044938 |
| source | IEEE Electronic Library (IEL) |
| subjects | Channels Circuit design Clock systems Clocks CMOS Controllers Cryo-CMOS Cryogenic electronics direct digital synthesis (DDS) Integrated circuits Phase locked loops Quantum computing quantum controller Qubit Qubits (quantum computing) Superconducting integrated circuits Superconducting microwave devices superconducting qubit Superconductivity |
| title | A 40-nm Cryo-CMOS Quantum Controller IC for Superconducting Qubit |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-27T16%3A57%3A00IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_ieee_&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%2040-nm%20Cryo-CMOS%20Quantum%20Controller%20IC%20for%20Superconducting%20Qubit&rft.jtitle=IEEE%20journal%20of%20solid-state%20circuits&rft.au=Kang,%20Kiseo&rft.date=2022-11-01&rft.volume=57&rft.issue=11&rft.spage=3274&rft.epage=3287&rft.pages=3274-3287&rft.issn=0018-9200&rft.eissn=1558-173X&rft.coden=IJSCBC&rft_id=info:doi/10.1109/JSSC.2022.3198663&rft_dat=%3Cproquest_ieee_%3E2727044938%3C/proquest_ieee_%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2727044938&rft_id=info:pmid/&rft_ieee_id=9866927&rfr_iscdi=true |