Unifying Spatial Accelerator Compilation With Idiomatic and Modular Transformations
Spatial accelerators provide high performance, energy efficiency, and flexibility. Recent design frameworks enable these architectures to be quickly designed and customized to a domain. However, constructing a compiler for this immense design space is challenging, first because accelerators express...
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| Veröffentlicht in: | IEEE MICRO 2022-09, Vol.42 (5), p.59-69 |
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| creator | Weng, Jian Liu, Sihao Kupsh, Dylan Nowatzki, Tony |
| description | Spatial accelerators provide high performance, energy efficiency, and flexibility. Recent design frameworks enable these architectures to be quickly designed and customized to a domain. However, constructing a compiler for this immense design space is challenging, first because accelerators express programs with high-level idioms that are difficult to recognize. Second, it is unpredictable whether certain transformations are beneficial or will lead to infeasible hardware mappings. Our work develops a general spatial-accelerator compiler with two key ideas. First, we propose an approach to recognize and represent useful dataflow idioms, along with a novel idiomatic memory representation. Second, we propose the principle of modular compilation, which combines hardware-aware transformation selection and an iterative approach to handle uncertainty. Our compiler achieves 2.3× speedup, and 98.7× area-normalized speedup over high-end server central processing unit (CPU). |
| doi_str_mv | 10.1109/MM.2022.3189976 |
| format | Article |
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| issn | 0272-1732 1937-4143 |
| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Accelerators Central processing units Codes Compilers CPUs Dynamic scheduling Hardware Hardware accelerators Micromechanical devices Program processors Spatial databases Topology Transformations (mathematics) |
| title | Unifying Spatial Accelerator Compilation With Idiomatic and Modular Transformations |
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