Optimization of Scatter Network Architectures and Bank Allocations for Sparse CNN Accelerators

Sparse convolutional neural network (SCNN) accelerators eliminate unnecessary computations and memory access by exploiting zero-valued activation pixels and filter weights. However, data movement between the multiplier array and accumulator buffer tends to be a performance bottleneck. Specifically,...

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Veröffentlicht in:	IEEE access 2022, Vol.10, p.1-1
Hauptverfasser:	Kim, Sunwoo, Park, Sungkyung, Park, Chester Sungchung
Format:	Artikel
Sprache:	eng
Schlagworte:	Accelerator Accelerators Accumulators Algorithms Allocations Arbitration Artificial neural networks Buffers Cartesian coordinates Computer architecture Convolutional neural networks convolutional neural networks (CNNs) cycle-accurate simulator Data compression dataflow Logic synthesis Network architecture network on a chip (NoC) Network topologies Optimization Performance degradation Performance enhancement Queueing Resource management Scattering System-on-chip Workload Workloads
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