27‐3: Invited Paper: High‐Performance Sub‐50nm Channel Length 3D Monolithically Stackable Vertical IGZO TFTs for Active‐Matrix Application
For the first time, we propose a stackable vertical Channel‐All‐Around (CAA) IGZO FETs. The device is fabricated in a BEOL‐compatible process flow where the channel and gate stack is deposited by Plasma‐Enhanced Atomic Layer Deposition (PEALD). The impact of IGZO cycle ratio and plasma power on the...
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Veröffentlicht in: | SID International Symposium Digest of technical papers 2022-06, Vol.53 (1), p.318-321 |
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creator | Duan, Xinlv Huang, Kailiang Feng, Junxiao Yin, Shihui Wang, Zhaogui Jiao, Guangfan Wu, Ying Jing, Weiliang Wang, Zhengbo Li, Jingyu Xu, Jeffrey Chen, Chuanke Chen, Qian Chuai, Xichen Lu, Congyan Yang, Guanhua Geng, Di Li, Ling Liu, Ming |
description | For the first time, we propose a stackable vertical Channel‐All‐Around (CAA) IGZO FETs. The device is fabricated in a BEOL‐compatible process flow where the channel and gate stack is deposited by Plasma‐Enhanced Atomic Layer Deposition (PEALD). The impact of IGZO cycle ratio and plasma power on the device electrical performance are studied. An optimized 50nm‐channel‐length CAA IGZO FET achieved Ion >30μA/μm and Ioff below 1.8×10‐17μA/μm at VDS = 1V. |
doi_str_mv | 10.1002/sdtp.15484 |
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fullrecord | <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_journals_2681372248</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>2681372248</sourcerecordid><originalsourceid>FETCH-LOGICAL-c1054-e924ab03b3eb79df6b311dfa3fd582da415ccf8cf202c228737644b7b673b97d3</originalsourceid><addsrcrecordid>eNp9kM1Kw0AURgdRsFY3PsGAOyF1_pJJuiutrYWKhVYRN2FmMrFT00mcTKvd-QjiI_okpta1qwvfPfe7cAA4x6iDESJXdearDg5ZzA5Ai-AoDhAOk0PQQijhQRJFj8fgpK6XCFHKWNICX4R_f3zSLhzbjfE6g1NRadeFN-Z50Sym2uWlWwmrNJytZZOEyK5gfyGs1QWcaPvsF5AO4G1py8L4hVGiKLZw5oV6EbLQ8EE7vwvhePR0B-fDeQ2bRthT3mx003crvDPvsFdVRYN5U9pTcJSLotZnf7MN7ofX8_5NMLkbjfu9SaAwClmgE8KERFRSLXmS5ZGkGGe5oHkWxiQTDIdK5bHKCSKKkJhTHjEmuYw4lQnPaBtc7HsrV76ude3TZbl2tnmZkijGlBPC4oa63FPKlXXtdJ5WzqyE26YYpTvn6c55-uu8gfEefjOF3v5DprPBfLq_-QHM4Ygh</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2681372248</pqid></control><display><type>article</type><title>27‐3: Invited Paper: High‐Performance Sub‐50nm Channel Length 3D Monolithically Stackable Vertical IGZO TFTs for Active‐Matrix Application</title><source>Wiley Online Library</source><creator>Duan, Xinlv ; Huang, Kailiang ; Feng, Junxiao ; Yin, Shihui ; Wang, Zhaogui ; Jiao, Guangfan ; Wu, Ying ; Jing, Weiliang ; Wang, Zhengbo ; Li, Jingyu ; Xu, Jeffrey ; Chen, Chuanke ; Chen, Qian ; Chuai, Xichen ; Lu, Congyan ; Yang, Guanhua ; Geng, Di ; Li, Ling ; Liu, Ming</creator><creatorcontrib>Duan, Xinlv ; Huang, Kailiang ; Feng, Junxiao ; Yin, Shihui ; Wang, Zhaogui ; Jiao, Guangfan ; Wu, Ying ; Jing, Weiliang ; Wang, Zhengbo ; Li, Jingyu ; Xu, Jeffrey ; Chen, Chuanke ; Chen, Qian ; Chuai, Xichen ; Lu, Congyan ; Yang, Guanhua ; Geng, Di ; Li, Ling ; Liu, Ming</creatorcontrib><description>For the first time, we propose a stackable vertical Channel‐All‐Around (CAA) IGZO FETs. The device is fabricated in a BEOL‐compatible process flow where the channel and gate stack is deposited by Plasma‐Enhanced Atomic Layer Deposition (PEALD). The impact of IGZO cycle ratio and plasma power on the device electrical performance are studied. An optimized 50nm‐channel‐length CAA IGZO FET achieved Ion >30μA/μm and Ioff below 1.8×10‐17μA/μm at VDS = 1V.</description><identifier>ISSN: 0097-966X</identifier><identifier>EISSN: 2168-0159</identifier><identifier>DOI: 10.1002/sdtp.15484</identifier><language>eng</language><publisher>Campbell: Wiley Subscription Services, Inc</publisher><subject>Atomic layer epitaxy ; Channel All Around ; Cycle ratio ; In-Ga-Zn-O ; Indium gallium zinc oxide ; Oxide semiconductor ; thin film transistor</subject><ispartof>SID International Symposium Digest of technical papers, 2022-06, Vol.53 (1), p.318-321</ispartof><rights>2022 The Society for Information Display</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c1054-e924ab03b3eb79df6b311dfa3fd582da415ccf8cf202c228737644b7b673b97d3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://onlinelibrary.wiley.com/doi/pdf/10.1002%2Fsdtp.15484$$EPDF$$P50$$Gwiley$$H</linktopdf><linktohtml>$$Uhttps://onlinelibrary.wiley.com/doi/full/10.1002%2Fsdtp.15484$$EHTML$$P50$$Gwiley$$H</linktohtml><link.rule.ids>314,780,784,1417,27924,27925,45574,45575</link.rule.ids></links><search><creatorcontrib>Duan, Xinlv</creatorcontrib><creatorcontrib>Huang, Kailiang</creatorcontrib><creatorcontrib>Feng, Junxiao</creatorcontrib><creatorcontrib>Yin, Shihui</creatorcontrib><creatorcontrib>Wang, Zhaogui</creatorcontrib><creatorcontrib>Jiao, Guangfan</creatorcontrib><creatorcontrib>Wu, Ying</creatorcontrib><creatorcontrib>Jing, Weiliang</creatorcontrib><creatorcontrib>Wang, Zhengbo</creatorcontrib><creatorcontrib>Li, Jingyu</creatorcontrib><creatorcontrib>Xu, Jeffrey</creatorcontrib><creatorcontrib>Chen, Chuanke</creatorcontrib><creatorcontrib>Chen, Qian</creatorcontrib><creatorcontrib>Chuai, Xichen</creatorcontrib><creatorcontrib>Lu, Congyan</creatorcontrib><creatorcontrib>Yang, Guanhua</creatorcontrib><creatorcontrib>Geng, Di</creatorcontrib><creatorcontrib>Li, Ling</creatorcontrib><creatorcontrib>Liu, Ming</creatorcontrib><title>27‐3: Invited Paper: High‐Performance Sub‐50nm Channel Length 3D Monolithically Stackable Vertical IGZO TFTs for Active‐Matrix Application</title><title>SID International Symposium Digest of technical papers</title><description>For the first time, we propose a stackable vertical Channel‐All‐Around (CAA) IGZO FETs. The device is fabricated in a BEOL‐compatible process flow where the channel and gate stack is deposited by Plasma‐Enhanced Atomic Layer Deposition (PEALD). The impact of IGZO cycle ratio and plasma power on the device electrical performance are studied. An optimized 50nm‐channel‐length CAA IGZO FET achieved Ion >30μA/μm and Ioff below 1.8×10‐17μA/μm at VDS = 1V.</description><subject>Atomic layer epitaxy</subject><subject>Channel All Around</subject><subject>Cycle ratio</subject><subject>In-Ga-Zn-O</subject><subject>Indium gallium zinc oxide</subject><subject>Oxide semiconductor</subject><subject>thin film transistor</subject><issn>0097-966X</issn><issn>2168-0159</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2022</creationdate><recordtype>article</recordtype><recordid>eNp9kM1Kw0AURgdRsFY3PsGAOyF1_pJJuiutrYWKhVYRN2FmMrFT00mcTKvd-QjiI_okpta1qwvfPfe7cAA4x6iDESJXdearDg5ZzA5Ai-AoDhAOk0PQQijhQRJFj8fgpK6XCFHKWNICX4R_f3zSLhzbjfE6g1NRadeFN-Z50Sym2uWlWwmrNJytZZOEyK5gfyGs1QWcaPvsF5AO4G1py8L4hVGiKLZw5oV6EbLQ8EE7vwvhePR0B-fDeQ2bRthT3mx003crvDPvsFdVRYN5U9pTcJSLotZnf7MN7ofX8_5NMLkbjfu9SaAwClmgE8KERFRSLXmS5ZGkGGe5oHkWxiQTDIdK5bHKCSKKkJhTHjEmuYw4lQnPaBtc7HsrV76ude3TZbl2tnmZkijGlBPC4oa63FPKlXXtdJ5WzqyE26YYpTvn6c55-uu8gfEefjOF3v5DprPBfLq_-QHM4Ygh</recordid><startdate>202206</startdate><enddate>202206</enddate><creator>Duan, Xinlv</creator><creator>Huang, Kailiang</creator><creator>Feng, Junxiao</creator><creator>Yin, Shihui</creator><creator>Wang, Zhaogui</creator><creator>Jiao, Guangfan</creator><creator>Wu, Ying</creator><creator>Jing, Weiliang</creator><creator>Wang, Zhengbo</creator><creator>Li, Jingyu</creator><creator>Xu, Jeffrey</creator><creator>Chen, Chuanke</creator><creator>Chen, Qian</creator><creator>Chuai, Xichen</creator><creator>Lu, Congyan</creator><creator>Yang, Guanhua</creator><creator>Geng, Di</creator><creator>Li, Ling</creator><creator>Liu, Ming</creator><general>Wiley Subscription Services, Inc</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>202206</creationdate><title>27‐3: Invited Paper: High‐Performance Sub‐50nm Channel Length 3D Monolithically Stackable Vertical IGZO TFTs for Active‐Matrix Application</title><author>Duan, Xinlv ; Huang, Kailiang ; Feng, Junxiao ; Yin, Shihui ; Wang, Zhaogui ; Jiao, Guangfan ; Wu, Ying ; Jing, Weiliang ; Wang, Zhengbo ; Li, Jingyu ; Xu, Jeffrey ; Chen, Chuanke ; Chen, Qian ; Chuai, Xichen ; Lu, Congyan ; Yang, Guanhua ; Geng, Di ; Li, Ling ; Liu, Ming</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c1054-e924ab03b3eb79df6b311dfa3fd582da415ccf8cf202c228737644b7b673b97d3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2022</creationdate><topic>Atomic layer epitaxy</topic><topic>Channel All Around</topic><topic>Cycle ratio</topic><topic>In-Ga-Zn-O</topic><topic>Indium gallium zinc oxide</topic><topic>Oxide semiconductor</topic><topic>thin film transistor</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Duan, Xinlv</creatorcontrib><creatorcontrib>Huang, Kailiang</creatorcontrib><creatorcontrib>Feng, Junxiao</creatorcontrib><creatorcontrib>Yin, Shihui</creatorcontrib><creatorcontrib>Wang, Zhaogui</creatorcontrib><creatorcontrib>Jiao, Guangfan</creatorcontrib><creatorcontrib>Wu, Ying</creatorcontrib><creatorcontrib>Jing, Weiliang</creatorcontrib><creatorcontrib>Wang, Zhengbo</creatorcontrib><creatorcontrib>Li, Jingyu</creatorcontrib><creatorcontrib>Xu, Jeffrey</creatorcontrib><creatorcontrib>Chen, Chuanke</creatorcontrib><creatorcontrib>Chen, Qian</creatorcontrib><creatorcontrib>Chuai, Xichen</creatorcontrib><creatorcontrib>Lu, Congyan</creatorcontrib><creatorcontrib>Yang, Guanhua</creatorcontrib><creatorcontrib>Geng, Di</creatorcontrib><creatorcontrib>Li, Ling</creatorcontrib><creatorcontrib>Liu, Ming</creatorcontrib><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>SID International Symposium Digest of technical papers</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Duan, Xinlv</au><au>Huang, Kailiang</au><au>Feng, Junxiao</au><au>Yin, Shihui</au><au>Wang, Zhaogui</au><au>Jiao, Guangfan</au><au>Wu, Ying</au><au>Jing, Weiliang</au><au>Wang, Zhengbo</au><au>Li, Jingyu</au><au>Xu, Jeffrey</au><au>Chen, Chuanke</au><au>Chen, Qian</au><au>Chuai, Xichen</au><au>Lu, Congyan</au><au>Yang, Guanhua</au><au>Geng, Di</au><au>Li, Ling</au><au>Liu, Ming</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>27‐3: Invited Paper: High‐Performance Sub‐50nm Channel Length 3D Monolithically Stackable Vertical IGZO TFTs for Active‐Matrix Application</atitle><jtitle>SID International Symposium Digest of technical papers</jtitle><date>2022-06</date><risdate>2022</risdate><volume>53</volume><issue>1</issue><spage>318</spage><epage>321</epage><pages>318-321</pages><issn>0097-966X</issn><eissn>2168-0159</eissn><abstract>For the first time, we propose a stackable vertical Channel‐All‐Around (CAA) IGZO FETs. The device is fabricated in a BEOL‐compatible process flow where the channel and gate stack is deposited by Plasma‐Enhanced Atomic Layer Deposition (PEALD). The impact of IGZO cycle ratio and plasma power on the device electrical performance are studied. An optimized 50nm‐channel‐length CAA IGZO FET achieved Ion >30μA/μm and Ioff below 1.8×10‐17μA/μm at VDS = 1V.</abstract><cop>Campbell</cop><pub>Wiley Subscription Services, Inc</pub><doi>10.1002/sdtp.15484</doi><tpages>4</tpages></addata></record> |
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subjects | Atomic layer epitaxy Channel All Around Cycle ratio In-Ga-Zn-O Indium gallium zinc oxide Oxide semiconductor thin film transistor |
title | 27‐3: Invited Paper: High‐Performance Sub‐50nm Channel Length 3D Monolithically Stackable Vertical IGZO TFTs for Active‐Matrix Application |
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