A 71-to-86-GHz 16-Element by 16-Beam Multi-User Beamforming Integrated Receiver Sub-Array for Massive MIMO
This article presents a 71-86 GHz 16-element array receiver application-specified integrated circuit (ASIC) for Massive multiple-input-multiple-output (MIMO) wireless uplink, featuring a multiple-output analog beamformer (BF) supporting up to 16 spatially multiplexed users at the same time. The ASIC...
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| Veröffentlicht in: | IEEE journal of solid-state circuits 2021-12, Vol.56 (12), p.3811-3826 |
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| container_issue | 12 |
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| container_title | IEEE journal of solid-state circuits |
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| creator | Naviasky, Emily Iotti, Lorenzo LaCaille, Greg Nikolic, Borivoje Alon, Elad Niknejad, Ali M. |
| description | This article presents a 71-86 GHz 16-element array receiver application-specified integrated circuit (ASIC) for Massive multiple-input-multiple-output (MIMO) wireless uplink, featuring a multiple-output analog beamformer (BF) supporting up to 16 spatially multiplexed users at the same time. The ASIC includes 16 direct-conversion mixer-first RX front-ends, local oscillator (LO) generation and distribution, and a 16\times 16 fully connected baseband analog beamformer, which derives each user stream as a linear combination of all the 16 antennas. The 16 mm 2 28 nm CMOS ASIC is packaged on an organic interposer including a linear patch antenna array. Over-the-air measurements demonstrate up to 2 Gb/s single-user data-rate, and four simultaneous links at 500 Mb/s each, with number of users and data rate only limited by setup constraints. Circuits are optimized for low power consumption in order to enable scaling to massive arrays, and consumes 1.7 W total power, for a power figure of 7 mW/antenna/user. |
| doi_str_mv | 10.1109/JSSC.2021.3118641 |
| format | Article |
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The ASIC includes 16 direct-conversion mixer-first RX front-ends, local oscillator (LO) generation and distribution, and a <inline-formula> <tex-math notation="LaTeX">16\times 16 </tex-math></inline-formula> fully connected baseband analog beamformer, which derives each user stream as a linear combination of all the 16 antennas. The 16 mm 2 28 nm CMOS ASIC is packaged on an organic interposer including a linear patch antenna array. Over-the-air measurements demonstrate up to 2 Gb/s single-user data-rate, and four simultaneous links at 500 Mb/s each, with number of users and data rate only limited by setup constraints. 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Circuits are optimized for low power consumption in order to enable scaling to massive arrays, and consumes 1.7 W total power, for a power figure of 7 mW/antenna/user.</description><subject>60 GHz</subject><subject>Antenna arrays</subject><subject>Antennas</subject><subject>Application specific integrated circuits</subject><subject>Array signal processing</subject><subject>baseband beamforming</subject><subject>Beamforming</subject><subject>CMOS</subject><subject>Complexity theory</subject><subject>Computer architecture</subject><subject>Integrated circuits</subject><subject>Millimeter wave communication</subject><subject>millimeter-wave (mm-wave)</subject><subject>MIMO</subject><subject>MIMO communication</subject><subject>multi-user beamforming</subject><subject>multi-user multiple-input–multiple-output (MU-MIMO)</subject><subject>packaged array</subject><subject>Patch antennas</subject><subject>Power consumption</subject><subject>Power management</subject><subject>Receivers & amplifiers</subject><subject>spatial multiplexing</subject><subject>two-stage beamforming</subject><subject>Wireless communication</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2021</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kFFrwjAQx8PYYM7tA4y9BPYcl0vSNH104tShCNPB3kpsL1LR1iXtwH36tSh7Ov53v7uDHyGPwAcAPHl5X61GA8EFDCSA0QquSA-iyDCI5dc16XEOhiWC81tyF8KujUoZ6JHdkMbA6ooZzSbTXwqajfd4wLKmm1OXXtEe6KLZ1wX7DOhpl13lD0W5pbOyxq23Neb0AzMsftr5qtmwoff2RFuKLmwIbZsuZovlPblxdh_w4VL7ZP02Xo-mbL6czEbDOcuk1DWLUEkhRaSscuiUjrNI242UlqscpbMugTgReYbagUKbG-6EkwZ0bFpeyD55Pp89-uq7wVCnu6rxZfsxFZqDVjoyqqXgTGW-CsGjS4--OFh_SoGnndG0M5p2RtOL0Xbn6bxTIOI_n0SJFLGWf5vgb14</recordid><startdate>20211201</startdate><enddate>20211201</enddate><creator>Naviasky, Emily</creator><creator>Iotti, Lorenzo</creator><creator>LaCaille, Greg</creator><creator>Nikolic, Borivoje</creator><creator>Alon, Elad</creator><creator>Niknejad, Ali M.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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| ispartof | IEEE journal of solid-state circuits, 2021-12, Vol.56 (12), p.3811-3826 |
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| subjects | 60 GHz Antenna arrays Antennas Application specific integrated circuits Array signal processing baseband beamforming Beamforming CMOS Complexity theory Computer architecture Integrated circuits Millimeter wave communication millimeter-wave (mm-wave) MIMO MIMO communication multi-user beamforming multi-user multiple-input–multiple-output (MU-MIMO) packaged array Patch antennas Power consumption Power management Receivers & amplifiers spatial multiplexing two-stage beamforming Wireless communication |
| title | A 71-to-86-GHz 16-Element by 16-Beam Multi-User Beamforming Integrated Receiver Sub-Array for Massive MIMO |
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