High-Resolution Waveform Capture Device on a Cyclone-V FPGA
We introduce the waveform capture device (WCD), a flexible measurement system capable of recording complex digital signals on trillionth-of-a-second (ps) time scales. The WCD is implemented via modular code on an off-the-shelf field-programmable gate-array (FPGA, Intel/Altera Cyclone V), and incorpo...
Gespeichert in:
Veröffentlicht in: | IEEE access 2021, Vol.9, p.146203-146213 |
---|---|
Hauptverfasser: | , , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | 146213 |
---|---|
container_issue | |
container_start_page | 146203 |
container_title | IEEE access |
container_volume | 9 |
creator | Charlot, Noeloikeau F. Gauthier, Daniel J. Pomerance, Andrew |
description | We introduce the waveform capture device (WCD), a flexible measurement system capable of recording complex digital signals on trillionth-of-a-second (ps) time scales. The WCD is implemented via modular code on an off-the-shelf field-programmable gate-array (FPGA, Intel/Altera Cyclone V), and incorporates both time-to-digital converter (TDC) and digital storage oscilloscope (DSO) functionality. The device captures a waveform by taking snapshots of a signal as it propagates down an ultra-fast transmission line known as a carry chain (CC). It is calibrated via a novel dynamic phase-shifting (DPS) method that requires substantially less data and resources than the state-of-the-art. Using DPS, we find the measurement resolution - or mean propagation delay from one CC element to the next - to be 4.91±0.04 ps (4.54±0.02 ps) for a pulse of logic high (low). Similarly, we find the single-shot precision - or mean error on the timing of the waveform - to be 29.52 ps (27.14 ps) for pulses of logic high (low). We verify these findings by reproducing commercial oscilloscope measurements of asynchronous ring-oscillators on FPGAs, finding the mean pulse width to be 0.240 ± 0.002 ns per inverter gate. Finally, we present a careful analysis of design constraints, introduce a novel error correction algorithm, and sketch a simple extension to the analog domain. We also provide the Verilog code instantiating our design's hardware primitives in an Appendix, and make our FPGA interfacing methods available as an open-source Python library at https://github.com/Noeloikeau/fpyga . |
doi_str_mv | 10.1109/ACCESS.2021.3123277 |
format | Article |
fullrecord | <record><control><sourceid>proquest_doaj_</sourceid><recordid>TN_cdi_proquest_journals_2593682804</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9585689</ieee_id><doaj_id>oai_doaj_org_article_08a31150e08846ccabe15a6b249f7a81</doaj_id><sourcerecordid>2593682804</sourcerecordid><originalsourceid>FETCH-LOGICAL-c408t-b38cb006afbcde79dfb69f9449ae3807385797027722ede26cf666e3d7f58f453</originalsourceid><addsrcrecordid>eNpNUNtqwkAQDaWFivULfAn0OXYv2Rt9ktSqILTUXh6XzWbWRqJrN1Hw7xsbkc7LDGfmnDmcKBpiNMIYqYdxlk2WyxFBBI8oJpQIcRX1COYqoYzy63_zbTSo6zVqS7YQE73ocVauvpM3qH21b0q_jb_MAZwPmzgzu2YfIH6CQ2khblcmzo628ltIPuPn1-n4LrpxpqphcO796ON58p7NksXLdJ6NF4lNkWySnEqbI8SNy20BQhUu58qpNFUGqESCSiaUQK1tQqAAwq3jnAMthGPSpYz2o3mnW3iz1rtQbkw4am9K_Qf4sNImNKWtQCNpKMYMAZIy5daaHDAzPCepcsJI3Grdd1q74H_2UDd67fdh29rXhCnKJZEoba9od2WDr-sA7vIVI30KXXeh61Po-hx6yxp2rBIALgzFJONS0V9i7Xq3</addsrcrecordid><sourcetype>Open Website</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2593682804</pqid></control><display><type>article</type><title>High-Resolution Waveform Capture Device on a Cyclone-V FPGA</title><source>IEEE Open Access Journals</source><source>DOAJ Directory of Open Access Journals</source><source>Elektronische Zeitschriftenbibliothek - Frei zugängliche E-Journals</source><creator>Charlot, Noeloikeau F. ; Gauthier, Daniel J. ; Pomerance, Andrew</creator><creatorcontrib>Charlot, Noeloikeau F. ; Gauthier, Daniel J. ; Pomerance, Andrew</creatorcontrib><description>We introduce the waveform capture device (WCD), a flexible measurement system capable of recording complex digital signals on trillionth-of-a-second (ps) time scales. The WCD is implemented via modular code on an off-the-shelf field-programmable gate-array (FPGA, Intel/Altera Cyclone V), and incorporates both time-to-digital converter (TDC) and digital storage oscilloscope (DSO) functionality. The device captures a waveform by taking snapshots of a signal as it propagates down an ultra-fast transmission line known as a carry chain (CC). It is calibrated via a novel dynamic phase-shifting (DPS) method that requires substantially less data and resources than the state-of-the-art. Using DPS, we find the measurement resolution - or mean propagation delay from one CC element to the next - to be 4.91±0.04 ps (4.54±0.02 ps) for a pulse of logic high (low). Similarly, we find the single-shot precision - or mean error on the timing of the waveform - to be 29.52 ps (27.14 ps) for pulses of logic high (low). We verify these findings by reproducing commercial oscilloscope measurements of asynchronous ring-oscillators on FPGAs, finding the mean pulse width to be 0.240 ± 0.002 ns per inverter gate. Finally, we present a careful analysis of design constraints, introduce a novel error correction algorithm, and sketch a simple extension to the analog domain. We also provide the Verilog code instantiating our design's hardware primitives in an Appendix, and make our FPGA interfacing methods available as an open-source Python library at https://github.com/Noeloikeau/fpyga .</description><identifier>ISSN: 2169-3536</identifier><identifier>EISSN: 2169-3536</identifier><identifier>DOI: 10.1109/ACCESS.2021.3123277</identifier><identifier>CODEN: IAECCG</identifier><language>eng</language><publisher>Piscataway: IEEE</publisher><subject>Algorithms ; Calibration ; carry chain (CC) ; Clocks ; Converters ; Cyclones ; digital storage oscilloscope (DSO) ; dynamic phase shift (DPS) ; Error correction ; field programmable gate array (FPGA) ; Field programmable gate arrays ; Oscillators ; Oscilloscopes ; phase lock loop (PLL) ; Phase locked loops ; Power transmission lines ; Pulse duration ; Registers ; Time-to-digital converter (TDC) ; Transmission line measurements ; Transmission lines ; Waveforms</subject><ispartof>IEEE access, 2021, Vol.9, p.146203-146213</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2021</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c408t-b38cb006afbcde79dfb69f9449ae3807385797027722ede26cf666e3d7f58f453</citedby><cites>FETCH-LOGICAL-c408t-b38cb006afbcde79dfb69f9449ae3807385797027722ede26cf666e3d7f58f453</cites><orcidid>0000-0002-4473-217X ; 0000-0002-3371-4275 ; 0000-0003-3082-9779</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9585689$$EHTML$$P50$$Gieee$$Hfree_for_read</linktohtml><link.rule.ids>314,776,780,860,2096,4010,27610,27900,27901,27902,54908</link.rule.ids></links><search><creatorcontrib>Charlot, Noeloikeau F.</creatorcontrib><creatorcontrib>Gauthier, Daniel J.</creatorcontrib><creatorcontrib>Pomerance, Andrew</creatorcontrib><title>High-Resolution Waveform Capture Device on a Cyclone-V FPGA</title><title>IEEE access</title><addtitle>Access</addtitle><description>We introduce the waveform capture device (WCD), a flexible measurement system capable of recording complex digital signals on trillionth-of-a-second (ps) time scales. The WCD is implemented via modular code on an off-the-shelf field-programmable gate-array (FPGA, Intel/Altera Cyclone V), and incorporates both time-to-digital converter (TDC) and digital storage oscilloscope (DSO) functionality. The device captures a waveform by taking snapshots of a signal as it propagates down an ultra-fast transmission line known as a carry chain (CC). It is calibrated via a novel dynamic phase-shifting (DPS) method that requires substantially less data and resources than the state-of-the-art. Using DPS, we find the measurement resolution - or mean propagation delay from one CC element to the next - to be 4.91±0.04 ps (4.54±0.02 ps) for a pulse of logic high (low). Similarly, we find the single-shot precision - or mean error on the timing of the waveform - to be 29.52 ps (27.14 ps) for pulses of logic high (low). We verify these findings by reproducing commercial oscilloscope measurements of asynchronous ring-oscillators on FPGAs, finding the mean pulse width to be 0.240 ± 0.002 ns per inverter gate. Finally, we present a careful analysis of design constraints, introduce a novel error correction algorithm, and sketch a simple extension to the analog domain. We also provide the Verilog code instantiating our design's hardware primitives in an Appendix, and make our FPGA interfacing methods available as an open-source Python library at https://github.com/Noeloikeau/fpyga .</description><subject>Algorithms</subject><subject>Calibration</subject><subject>carry chain (CC)</subject><subject>Clocks</subject><subject>Converters</subject><subject>Cyclones</subject><subject>digital storage oscilloscope (DSO)</subject><subject>dynamic phase shift (DPS)</subject><subject>Error correction</subject><subject>field programmable gate array (FPGA)</subject><subject>Field programmable gate arrays</subject><subject>Oscillators</subject><subject>Oscilloscopes</subject><subject>phase lock loop (PLL)</subject><subject>Phase locked loops</subject><subject>Power transmission lines</subject><subject>Pulse duration</subject><subject>Registers</subject><subject>Time-to-digital converter (TDC)</subject><subject>Transmission line measurements</subject><subject>Transmission lines</subject><subject>Waveforms</subject><issn>2169-3536</issn><issn>2169-3536</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2021</creationdate><recordtype>article</recordtype><sourceid>ESBDL</sourceid><sourceid>RIE</sourceid><sourceid>DOA</sourceid><recordid>eNpNUNtqwkAQDaWFivULfAn0OXYv2Rt9ktSqILTUXh6XzWbWRqJrN1Hw7xsbkc7LDGfmnDmcKBpiNMIYqYdxlk2WyxFBBI8oJpQIcRX1COYqoYzy63_zbTSo6zVqS7YQE73ocVauvpM3qH21b0q_jb_MAZwPmzgzu2YfIH6CQ2khblcmzo628ltIPuPn1-n4LrpxpqphcO796ON58p7NksXLdJ6NF4lNkWySnEqbI8SNy20BQhUu58qpNFUGqESCSiaUQK1tQqAAwq3jnAMthGPSpYz2o3mnW3iz1rtQbkw4am9K_Qf4sNImNKWtQCNpKMYMAZIy5daaHDAzPCepcsJI3Grdd1q74H_2UDd67fdh29rXhCnKJZEoba9od2WDr-sA7vIVI30KXXeh61Po-hx6yxp2rBIALgzFJONS0V9i7Xq3</recordid><startdate>2021</startdate><enddate>2021</enddate><creator>Charlot, Noeloikeau F.</creator><creator>Gauthier, Daniel J.</creator><creator>Pomerance, Andrew</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>ESBDL</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>7SR</scope><scope>8BQ</scope><scope>8FD</scope><scope>JG9</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>DOA</scope><orcidid>https://orcid.org/0000-0002-4473-217X</orcidid><orcidid>https://orcid.org/0000-0002-3371-4275</orcidid><orcidid>https://orcid.org/0000-0003-3082-9779</orcidid></search><sort><creationdate>2021</creationdate><title>High-Resolution Waveform Capture Device on a Cyclone-V FPGA</title><author>Charlot, Noeloikeau F. ; Gauthier, Daniel J. ; Pomerance, Andrew</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c408t-b38cb006afbcde79dfb69f9449ae3807385797027722ede26cf666e3d7f58f453</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2021</creationdate><topic>Algorithms</topic><topic>Calibration</topic><topic>carry chain (CC)</topic><topic>Clocks</topic><topic>Converters</topic><topic>Cyclones</topic><topic>digital storage oscilloscope (DSO)</topic><topic>dynamic phase shift (DPS)</topic><topic>Error correction</topic><topic>field programmable gate array (FPGA)</topic><topic>Field programmable gate arrays</topic><topic>Oscillators</topic><topic>Oscilloscopes</topic><topic>phase lock loop (PLL)</topic><topic>Phase locked loops</topic><topic>Power transmission lines</topic><topic>Pulse duration</topic><topic>Registers</topic><topic>Time-to-digital converter (TDC)</topic><topic>Transmission line measurements</topic><topic>Transmission lines</topic><topic>Waveforms</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Charlot, Noeloikeau F.</creatorcontrib><creatorcontrib>Gauthier, Daniel J.</creatorcontrib><creatorcontrib>Pomerance, Andrew</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE Open Access Journals</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Engineered Materials Abstracts</collection><collection>METADEX</collection><collection>Technology Research Database</collection><collection>Materials Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><collection>DOAJ Directory of Open Access Journals</collection><jtitle>IEEE access</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Charlot, Noeloikeau F.</au><au>Gauthier, Daniel J.</au><au>Pomerance, Andrew</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>High-Resolution Waveform Capture Device on a Cyclone-V FPGA</atitle><jtitle>IEEE access</jtitle><stitle>Access</stitle><date>2021</date><risdate>2021</risdate><volume>9</volume><spage>146203</spage><epage>146213</epage><pages>146203-146213</pages><issn>2169-3536</issn><eissn>2169-3536</eissn><coden>IAECCG</coden><abstract>We introduce the waveform capture device (WCD), a flexible measurement system capable of recording complex digital signals on trillionth-of-a-second (ps) time scales. The WCD is implemented via modular code on an off-the-shelf field-programmable gate-array (FPGA, Intel/Altera Cyclone V), and incorporates both time-to-digital converter (TDC) and digital storage oscilloscope (DSO) functionality. The device captures a waveform by taking snapshots of a signal as it propagates down an ultra-fast transmission line known as a carry chain (CC). It is calibrated via a novel dynamic phase-shifting (DPS) method that requires substantially less data and resources than the state-of-the-art. Using DPS, we find the measurement resolution - or mean propagation delay from one CC element to the next - to be 4.91±0.04 ps (4.54±0.02 ps) for a pulse of logic high (low). Similarly, we find the single-shot precision - or mean error on the timing of the waveform - to be 29.52 ps (27.14 ps) for pulses of logic high (low). We verify these findings by reproducing commercial oscilloscope measurements of asynchronous ring-oscillators on FPGAs, finding the mean pulse width to be 0.240 ± 0.002 ns per inverter gate. Finally, we present a careful analysis of design constraints, introduce a novel error correction algorithm, and sketch a simple extension to the analog domain. We also provide the Verilog code instantiating our design's hardware primitives in an Appendix, and make our FPGA interfacing methods available as an open-source Python library at https://github.com/Noeloikeau/fpyga .</abstract><cop>Piscataway</cop><pub>IEEE</pub><doi>10.1109/ACCESS.2021.3123277</doi><tpages>11</tpages><orcidid>https://orcid.org/0000-0002-4473-217X</orcidid><orcidid>https://orcid.org/0000-0002-3371-4275</orcidid><orcidid>https://orcid.org/0000-0003-3082-9779</orcidid><oa>free_for_read</oa></addata></record> |
fulltext | fulltext |
identifier | ISSN: 2169-3536 |
ispartof | IEEE access, 2021, Vol.9, p.146203-146213 |
issn | 2169-3536 2169-3536 |
language | eng |
recordid | cdi_proquest_journals_2593682804 |
source | IEEE Open Access Journals; DOAJ Directory of Open Access Journals; Elektronische Zeitschriftenbibliothek - Frei zugängliche E-Journals |
subjects | Algorithms Calibration carry chain (CC) Clocks Converters Cyclones digital storage oscilloscope (DSO) dynamic phase shift (DPS) Error correction field programmable gate array (FPGA) Field programmable gate arrays Oscillators Oscilloscopes phase lock loop (PLL) Phase locked loops Power transmission lines Pulse duration Registers Time-to-digital converter (TDC) Transmission line measurements Transmission lines Waveforms |
title | High-Resolution Waveform Capture Device on a Cyclone-V FPGA |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-02T03%3A41%3A42IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_doaj_&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=High-Resolution%20Waveform%20Capture%20Device%20on%20a%20Cyclone-V%20FPGA&rft.jtitle=IEEE%20access&rft.au=Charlot,%20Noeloikeau%20F.&rft.date=2021&rft.volume=9&rft.spage=146203&rft.epage=146213&rft.pages=146203-146213&rft.issn=2169-3536&rft.eissn=2169-3536&rft.coden=IAECCG&rft_id=info:doi/10.1109/ACCESS.2021.3123277&rft_dat=%3Cproquest_doaj_%3E2593682804%3C/proquest_doaj_%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2593682804&rft_id=info:pmid/&rft_ieee_id=9585689&rft_doaj_id=oai_doaj_org_article_08a31150e08846ccabe15a6b249f7a81&rfr_iscdi=true |