Fine-grain reconfigurable platform: FPGA hardware design and software toolset development
A complete system for the implementation of digital logic in a fine-grain reconfigurable platform is introduced. The system is composed of two parts. The fine-grain reconfigurable hardware platform (FPGA) on which the logic is implemented and the set of CAD tools for mapping logic to the FPGA platfo...
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| Veröffentlicht in: | Journal of physics. Conference series 2005-01, Vol.10 (1), p.352-356 |
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| container_title | Journal of physics. Conference series |
| container_volume | 10 |
| creator | Pappas, I Kalenteridis, V Vassiliadis, N Pournara, H Siozios, K Koutroumpezis, G Tatas, K Nikolaidis, S Siskos, S Soudris, D J Thanailakis, A |
| description | A complete system for the implementation of digital logic in a fine-grain reconfigurable platform is introduced. The system is composed of two parts. The fine-grain reconfigurable hardware platform (FPGA) on which the logic is implemented and the set of CAD tools for mapping logic to the FPGA platform. A novel energy-efficient FPGA architecture is presented (CLB, interconnect network, configuration hardware) and simulated in STM 0.18 μm CMOS technology. Concerning the tool flow, each tool can operate as a standalone program as well as part of a complete design framework, composed by existing and new tools. |
| doi_str_mv | 10.1088/1742-6596/10/1/086 |
| format | Article |
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| subjects | CMOS Field programmable gate arrays Logic Physics Reconfigurable hardware |
| title | Fine-grain reconfigurable platform: FPGA hardware design and software toolset development |
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