Metallic bonding of optoelectronic dies to silicon wafers

In future generation electronic circuits the severe bottleneck which is expected on the level of interconnections seems to has only one possible solution: that of using optical interconnection layers instead of the electrical ones. Our research focuses on the development of a die-to-wafer metallic bonding technique for the integration of a photonic wiring circuit on top of the CMOS wafer. Metal plating of the contact surfaces of both the optoelectronic devices and CMOS wafer pads using appropriate alloys are examined. After experiments with different metal alloys we decided to proceed with Au/Sn deposition on both CMOS and III-V photonics. Precise alloy composition has been achieved with multilayers and flat Si and InP dies have been successfully bonded on flat Si wafers using either hard Au-20Sn or soft Au- 39Sn and Au-71Sn with solder joints thickness ranging from 0.1 to several μm. Experiments aiming to the study of alloys incorporating rare earths and their influence to the properties of the metallic bonding have been performed. Initial encouraging results are reported.