A Low Area High Speed FPGA Implementation of AES Architecture for Cryptography Application

Nowadays, a huge amount of digital data is frequently changed among different embedded devices over wireless communication technologies. Data security is considered an important parameter for avoiding information loss and preventing cyber-crimes. This research article details the low power high-spee...

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Veröffentlicht in:Electronics (Basel) 2021-08, Vol.10 (16), p.2023
Hauptverfasser: Kumar, Thanikodi, Reddy, Kasarla, Rinaldi, Stefano, Parameshachari, Bidare, Arunachalam, Kavitha
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Sprache:eng
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