VLSI Implementation of Fault Tolerance Multiplier based on Reversible Logic Gate

Multiplier is one of the essential component in the digital world such as in digital signal processing, microprocessor, quantum computing and widely used in arithmetic unit. Due to the complexity of the multiplier, tendency of errors are very high. This paper aimed to design a 2×2 bit Fault Toleranc...

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Veröffentlicht in:	IOP conference series. Materials Science and Engineering 2017-08, Vol.226 (1), p.12140
Hauptverfasser:	Ahmad, Nabihah, Mokhtar, Ahmad Hakimi, Othman, Nurmiza binti, Soon, Chin Fhong, Rahman, Ab Al Hadi Ab
Format:	Artikel
Sprache:	eng
Schlagworte:	Arithmetic and logic units CMOS Digital signal processing Electronic design automation Fault tolerance Integrated circuits Logic circuits Power consumption Quantum computing
Online-Zugang:	Volltext
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