Low-Power and High-Performance Ternary SRAM Designs With Application to CNTFET Technology

This paper presents two efficient ternary SRAM designs appropriate for several transistor-based technologies. The first design is based on the cycle operator in ternary logic while the second is a buffer-based design that employs the positive and negative ternary inverters. Both the designs consume...

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Veröffentlicht in:	IEEE transactions on nanotechnology 2021, Vol.20, p.562-566
Hauptverfasser:	Srinivasu, B., Sridharan, K.
Format:	Artikel
Sprache:	eng
Schlagworte:	carbon nanotube field effect transistor (CNTFET) Carbon nanotubes Circuit design CNTFETs Delays Field effect transistors Inverters Logic gates low delay low power Multivalued logic Power consumption Random access memory Semiconductor devices SRAM cells Ternary SRAM Transistors unary operators of multivalued logic
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