Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors

In this paper, we proposed a novel saddle type FinFET (S-FinFET) to effectively solve problems occurring under the capacitor node of a dynamic random-access memory (DRAM) cell and showed how its structure was superior to conventional S-FinFETs in terms of short channel effect (SCE), subthreshold slo...

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Veröffentlicht in:Electronics (Basel) 2019-01, Vol.8 (1), p.8
Hauptverfasser: Kim, Young Kwon, Lee, Jin Sung, Kim, Geon, Park, Taesik, Kim, Hui Jung, Cho, Young Pyo, Park, Young June, Lee, Myoung Jin
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container_issue 1
container_start_page 8
container_title Electronics (Basel)
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creator Kim, Young Kwon
Lee, Jin Sung
Kim, Geon
Park, Taesik
Kim, Hui Jung
Cho, Young Pyo
Park, Young June
Lee, Myoung Jin
description In this paper, we proposed a novel saddle type FinFET (S-FinFET) to effectively solve problems occurring under the capacitor node of a dynamic random-access memory (DRAM) cell and showed how its structure was superior to conventional S-FinFETs in terms of short channel effect (SCE), subthreshold slope (SS), and gate-induced drain leakage (GIDL). The proposed FinFET exhibited four times lower Ioff than modified S-FinFET, called RFinFET, with more improved drain-induced barrier lowering (DIBL) characteristics, while minimizing Ion reduction compared to RFinFET. Our results also confirmed that the proposed device showed improved drain-induced barrier lowering (DIBL) and Ioff characteristics as gate channel length decreased.
doi_str_mv 10.3390/electronics8010008
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subjects Conflicts of interest
Dynamic random access memory
Electric fields
Silicon
Transistors
title Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors
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