A Construction Kit for Efficient Low Power Neural Network Accelerator Designs

Implementing embedded neural network processing at the edge requires efficient hardware acceleration that couples high computational performance with low power consumption. Driven by the rapid evolution of network architectures and their algorithmic features, accelerator designs are constantly updat...

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Veröffentlicht in:	arXiv.org 2021-06
Hauptverfasser:	Jokic, Petar, Azarkhish, Erfan, Bonetti, Andrea, Pons, Marc, Emery, Stephane, Benini, Luca
Format:	Artikel
Sprache:	eng
Schlagworte:	Accelerators Computer architecture Design Designers Hardware Neural networks Optimization Optimization techniques Performance measurement Power consumption
Online-Zugang:	Volltext
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